<p>Memristor-based analogue computing in memory (CIM) offers revolutionary gains in energy efficiency and computing power for data-intensive applications such as artificial intelligence. However, it typically struggles with achieving high accuracy at the same time, owing to the noise-sensitive nature of analogue computing and the non-ideal characteristics at the device and circuit levels that inevitably result in computing errors. Although progress has been made in device engineering and hardware–algorithm co-optimization to mitigate the error and parasitic effects, many of these advances inadvertently incur a hardware or energy consumption overhead, undermining the core benefits of analogue CIM. This Review dissects the computing error sources across the CIM hierarchy from the memristor device and array to the system architecture and algorithm, and evaluates the strategies to minimize those errors. We highlight the material and device innovations, array-level techniques and algorithm–architecture co-design frameworks towards high-accuracy analogue CIM. By dissecting the trade-off between computing accuracy and implementation cost, this Review draws a roadmap for translating memristor-based analogue CIM technology from proof-of-concept prototypes to large-scale deployment for accelerating next-generation artificial intelligence.</p>