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<p>Two-dimensional semiconductors are emerging as crucial materials for the post-Moore era. However, the transition to industrial-scale applications is hindered by engineering challenges, including the contact engineering. Among different strategies, edge contact offers advantages of ultimate contact scaling and the elimination of Fermi level pinning, but struggles with co-optimization between on-state current, threshold voltage and off-state leakage current. Here we address these challenges by utilizing an in situ multistep process, in which etching, soft plasma treatment and metal deposition are performed sequentially within the same custom-designed high-vacuum chamber to minimize interface defects. This approach enables molybdenum disulfide (MoS<sub>2</sub>)-based edge-contact field-effect transistors exhibiting an ultralow leakage current of 1.75 × 10<sup>−20</sup> A μm<sup>−1</sup> at zero gate voltage and an enhanced on-state current. The optimized capacitorless two-transistor dynamic random-access memory (DRAM) achieves a quasi-non-volatile memory operation, 5-bit memory accuracy and nanosecond-level write speed, demonstrating the potential for two-dimensional semiconductor-based circuits and memory devices.</p>

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Quasi-non-volatile capacitorless DRAM based on ultralow-leakage edge-contact MoS2 transistors

  • 期刊论文

  • 发表日期：

    2026年1月14日

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  • Saifei Gou,
  • Yuxuan Zhu,
  • Zhejia Zhang,
  • Menglin Huang,
  • Jinshu Zhang,
  • Xiangqi Dong,
  • Mingrui Ao,
  • Qicheng Sun,
  • Zhenggang Cai,
  • Yan Hu,
  • Yufei Song,
  • Jiahao Wang,
  • Haojie Chen,
  • Yuchen Tian,
  • Xinliu He,
  • Jieya Shang,
  • Zhengjie Sun,
  • Qihao Chen,
  • Yang Liu,
  • Zihan Xu,
  • Xiaofei Yue,
  • Chunxiao Cong,
  • Yin Wang,
  • Liwei Liu,
  • Xiaojun Tan,
  • Mengjiao Li,
  • Chen Yang,
  • Hao Meng,
  • Mingyuan Liu,
  • Huihui Li,
  • Shiyou Chen,
  • Peng Zhou,
  • Wenzhong Bao

摘要

Two-dimensional semiconductors are emerging as crucial materials for the post-Moore era. However, the transition to industrial-scale applications is hindered by engineering challenges, including the contact engineering. Among different strategies, edge contact offers advantages of ultimate contact scaling and the elimination of Fermi level pinning, but struggles with co-optimization between on-state current, threshold voltage and off-state leakage current. Here we address these challenges by utilizing an in situ multistep process, in which etching, soft plasma treatment and metal deposition are performed sequentially within the same custom-designed high-vacuum chamber to minimize interface defects. This approach enables molybdenum disulfide (MoS2)-based edge-contact field-effect transistors exhibiting an ultralow leakage current of 1.75 × 10−20 A μm−1 at zero gate voltage and an enhanced on-state current. The optimized capacitorless two-transistor dynamic random-access memory (DRAM) achieves a quasi-non-volatile memory operation, 5-bit memory accuracy and nanosecond-level write speed, demonstrating the potential for two-dimensional semiconductor-based circuits and memory devices.