<p>Crystalline silicon solar cells continue to dominate the photovoltaic industry, with tunnel oxide passivating contact (TOPCon) technology emerging as a prominent candidate. However, the efficiency of industrial-scale TOPCon solar cells remains limited by their suboptimal electrical performance, falling short of the Auger limit. Here we propose a dual-sided synergistic strategy that achieves a certified efficiency of 26.66% for industrial-scale TOPCon cells on M10-size wafers. The implementation of a front-side high-sheet-resistance boron emitter improves the passivation quality, and an optimized grid design reduces carrier transport losses. A rear-side double-layer tunnel oxide silicon/polysilicon structure suppresses silver-induced degradation by preventing silver diffusion from the electrodes into the silicon substrate, thereby maintaining excellent interfacial passivation. Moreover, the high crystallinity of the inner polysilicon layer, along with a lower concentration of inactive phosphorus dopants in the silicon substrate, leads to superior passivation performance. Rear-side localized thinning of the polysilicon layer also improves the bifaciality to 88.3%.</p>

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Dual-side electrical refinement enables efficient industrial tunnel oxide passivating contact silicon solar cells

  • Zhenhai Yang,
  • Sheshicheng Chen,
  • Jie Mao,
  • Kun Cao,
  • Zunke Liu,
  • Haojiang Du,
  • Zhao Wang,
  • Yuanfang Zhang,
  • Jinjin Chen,
  • Jiajia Zhu,
  • Menglei Xu,
  • Wenqi Li,
  • Hao Jin,
  • Xinyu Zhang,
  • Huiwei Du,
  • Jie Yang,
  • Peiting Zheng,
  • Yuheng Zeng,
  • Jichun Ye

摘要

Crystalline silicon solar cells continue to dominate the photovoltaic industry, with tunnel oxide passivating contact (TOPCon) technology emerging as a prominent candidate. However, the efficiency of industrial-scale TOPCon solar cells remains limited by their suboptimal electrical performance, falling short of the Auger limit. Here we propose a dual-sided synergistic strategy that achieves a certified efficiency of 26.66% for industrial-scale TOPCon cells on M10-size wafers. The implementation of a front-side high-sheet-resistance boron emitter improves the passivation quality, and an optimized grid design reduces carrier transport losses. A rear-side double-layer tunnel oxide silicon/polysilicon structure suppresses silver-induced degradation by preventing silver diffusion from the electrodes into the silicon substrate, thereby maintaining excellent interfacial passivation. Moreover, the high crystallinity of the inner polysilicon layer, along with a lower concentration of inactive phosphorus dopants in the silicon substrate, leads to superior passivation performance. Rear-side localized thinning of the polysilicon layer also improves the bifaciality to 88.3%.