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<p>The rapid development of remote sensing, satellite radar, and medical equipment has created an imperative demand for ultra-efficient image compression and reconstruction. We demonstrate an end-to-end image compression and reconstruction approach using an opto-electronic computing processor, achieving orders-of-magnitude higher speed and lower energy consumption than electronic counterparts. Its core is a 32×32 silicon photonic computing chip, which monolithically integrates 32 high-speed modulators, 32 detectors, and a programmable photonic matrix core, co-packaged with all necessary control electronics. Leveraging the photonic core’s programmability, the processor generates trainable compressive matrices, enabling adjustable image compression ratios (up to 256×) to meet diverse application needs. Deploying a customized lightweight photonic integrated circuit-oriented network enables high-quality reconstruction of compressed images. Our approach core parts require end-to-end latency of 49.5 ps/pixel while consuming less than 10.6nJ/pixel. This work not only provides a transformative solution for computational image processing but also opens new avenues for photonic computing application.</p>

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Photonic computing enabled end-to-end image compression and reconstruction with adjustable ratio and high-fidelity

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2026年4月27日

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  • Yuhang Wang,
  • Ang Li,
  • Yihang Shao,
  • Qiang Li,
  • Yang Zhao,
  • Shilong Pan

摘要

The rapid development of remote sensing, satellite radar, and medical equipment has created an imperative demand for ultra-efficient image compression and reconstruction. We demonstrate an end-to-end image compression and reconstruction approach using an opto-electronic computing processor, achieving orders-of-magnitude higher speed and lower energy consumption than electronic counterparts. Its core is a 32×32 silicon photonic computing chip, which monolithically integrates 32 high-speed modulators, 32 detectors, and a programmable photonic matrix core, co-packaged with all necessary control electronics. Leveraging the photonic core’s programmability, the processor generates trainable compressive matrices, enabling adjustable image compression ratios (up to 256×) to meet diverse application needs. Deploying a customized lightweight photonic integrated circuit-oriented network enables high-quality reconstruction of compressed images. Our approach core parts require end-to-end latency of 49.5 ps/pixel while consuming less than 10.6nJ/pixel. This work not only provides a transformative solution for computational image processing but also opens new avenues for photonic computing application.