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<p>The rapid growth of artificial intelligence and the Internet of Things calls for compact hardware platforms that integrate sensing, computing, and nonlinear processing within a unified architecture. However, most existing neuromorphic systems implement only partial functionalities and rely on heterogeneous device integration, limiting scalability and efficiency. Here, we show a high-speed, reconfigurable multi-modal split-floating-gate memory that monolithically integrates in-sensor computing, in-memory computing, and multiple nonlinear activation functions within a single device structure. By programming charges in spatially separated floating gates, the device enables non-volatile analog control of photoresponsivity and conductance, as well as electrically reconfigurable rectification to emulate ReLU and Sigmoid activations. We further demonstrate a fully hardware-implemented sensor–processor system based on the multi-modal split-floating-gate memory arrays that performs complete unsupervised and supervised learning tasks. This work establishes a compact, energy-efficient, and reconfigurable hardware foundation for scalable intelligent systems beyond conventional silicon architectures.</p>

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A reconfigurable photosensitive split-floating-gate memory for neuromorphic computing and nonlinear activation

  • 期刊论文

  • 出版模式：

    开放获取

  • 发表日期：

    2026年1月14日

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  • Zhi-Cheng Zhang,
  • Yuan Li,
  • Jian Yao,
  • Zhaolong Chen,
  • Fu-Dong Wang,
  • Shu-Han Si,
  • Yue Ding,
  • Hui-Ling Qi,
  • Tong-Bu Lu,
  • Lixing Kang,
  • Zhi-Bo Liu,
  • Jian-Guo Tian,
  • Xu-Dong Chen

摘要

The rapid growth of artificial intelligence and the Internet of Things calls for compact hardware platforms that integrate sensing, computing, and nonlinear processing within a unified architecture. However, most existing neuromorphic systems implement only partial functionalities and rely on heterogeneous device integration, limiting scalability and efficiency. Here, we show a high-speed, reconfigurable multi-modal split-floating-gate memory that monolithically integrates in-sensor computing, in-memory computing, and multiple nonlinear activation functions within a single device structure. By programming charges in spatially separated floating gates, the device enables non-volatile analog control of photoresponsivity and conductance, as well as electrically reconfigurable rectification to emulate ReLU and Sigmoid activations. We further demonstrate a fully hardware-implemented sensor–processor system based on the multi-modal split-floating-gate memory arrays that performs complete unsupervised and supervised learning tasks. This work establishes a compact, energy-efficient, and reconfigurable hardware foundation for scalable intelligent systems beyond conventional silicon architectures.