<p>Recent advances in memory technologies, devices, and materials have shown great potential for integration into neuromorphic electronic systems. However, a significant gap remains between the development of these materials and the realization of large-scale, fully functional systems. One key challenge is determining which devices and materials are best suited for specific functions and how they can be paired with complementary metal-oxide-semiconductor circuitry. To address this, we present a mixed-signal neuromorphic architecture designed to explore the integration of on-chip learning circuits and novel two- and three-terminal devices. The chip serves as a platform to bridge the gap between silicon-based neuromorphic computation and the latest advancements in emerging devices. In this paper, we demonstrate the readiness of the architecture for device integration through comprehensive measurements and simulations. The processor provides a practical system for testing bio-inspired learning algorithms alongside emerging devices, establishing a tangible link between brain-inspired computation and cutting-edge device research.</p>

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A neuromorphic processor with on-chip learning for beyond-CMOS device integration

  • Hugh Greatorex,
  • Ole Richter,
  • Michele Mastella,
  • Madison Cotteret,
  • Philipp Klein,
  • Maxime Fabre,
  • Arianna Rubino,
  • Willian Soares Girão,
  • Junren Chen,
  • Martin Ziegler,
  • Laura Bégon-Lours,
  • Giacomo Indiveri,
  • Elisabetta Chicca

摘要

Recent advances in memory technologies, devices, and materials have shown great potential for integration into neuromorphic electronic systems. However, a significant gap remains between the development of these materials and the realization of large-scale, fully functional systems. One key challenge is determining which devices and materials are best suited for specific functions and how they can be paired with complementary metal-oxide-semiconductor circuitry. To address this, we present a mixed-signal neuromorphic architecture designed to explore the integration of on-chip learning circuits and novel two- and three-terminal devices. The chip serves as a platform to bridge the gap between silicon-based neuromorphic computation and the latest advancements in emerging devices. In this paper, we demonstrate the readiness of the architecture for device integration through comprehensive measurements and simulations. The processor provides a practical system for testing bio-inspired learning algorithms alongside emerging devices, establishing a tangible link between brain-inspired computation and cutting-edge device research.