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<p>The current-induced motion of the magnetic domain wall (DW) in a synthetic antiferromagnet (SAF) has been reported to reach velocities of up to a few hundred m/s. By implementing this feature into three-terminal devices with sub-hundred nm sizes, it is possible to achieve higher density memory with SRAM-level nanosecond switching speeds. Two main hurdles for the realization of this type of device are (1) ensuring that the initial spin states on both ends of the device are anti-parallel and (2) minimizing the degradation of the SAF property during the ion beam etching process (IBE). Here, we present a new simple scheme of anti-parallel spin initialization and recovery process from the IBE damage. Employing these techniques on domain-wall magnetic tunnel junction (DW-MTJ) three-terminal devices, we validated numerous write operations with a domain wall velocity of about 73 m/s. Based on the results, when our device scales down to 100 nm in length, the expected write operation speed reaches 1.0 ns, which is comparable to SRAM’s speed.</p>

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Spin-orbit torque initialization of domain-wall and process damage cure in a domain-wall magnetoresistive device with a synthetic antiferromagnet

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2025年9月5日

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  • Atsushi Okada,
  • Soichiro Mizusaki,
  • Naoki Hase,
  • Jungsik Park,
  • Seungjae Lee,
  • Youngjin Cho,
  • Kwangseok Kim,
  • Kiwoong Kim,
  • Seonggeon Park,
  • Sungchul Lee,
  • Junho Jeong,
  • Jeong-Heon Park,
  • UngHwan Pi

摘要

The current-induced motion of the magnetic domain wall (DW) in a synthetic antiferromagnet (SAF) has been reported to reach velocities of up to a few hundred m/s. By implementing this feature into three-terminal devices with sub-hundred nm sizes, it is possible to achieve higher density memory with SRAM-level nanosecond switching speeds. Two main hurdles for the realization of this type of device are (1) ensuring that the initial spin states on both ends of the device are anti-parallel and (2) minimizing the degradation of the SAF property during the ion beam etching process (IBE). Here, we present a new simple scheme of anti-parallel spin initialization and recovery process from the IBE damage. Employing these techniques on domain-wall magnetic tunnel junction (DW-MTJ) three-terminal devices, we validated numerous write operations with a domain wall velocity of about 73 m/s. Based on the results, when our device scales down to 100 nm in length, the expected write operation speed reaches 1.0 ns, which is comparable to SRAM’s speed.