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<p>The double submodule (DSM), which integrates two series-connected half-bridges within a single submodule, has gained attention as a compact and space-efficient building block for the modular multilevel converters (MMCs) used in constrained environments such as urban power-conversion stations and electric ship propulsion systems. Reliable DSM operation must be verified under realistic loading conditions. However, existing submodule (SM) test approaches, including mission profile emulations (MPEs) and power-hardware-in-the-loop simulations (PHILS), are unsuitable for DSMs. When applied to DSMs, these approaches require a high-voltage power amplifier with an output capability exceeding twice the dc rating of an equivalent single SM, which significantly increases implementation complexity. This paper proposes a DSM-based loading-test method that eliminates the need for an auxiliary high-voltage power amplifier. Two DSMs are interconnected through an interface inductor to synthesize arm-current-shaped waveforms, while an auxiliary dc source compensates only the energy loss to sustain operation. Experimental results obtained from laboratory-scale DSM hardware demonstrate that the proposed method reproduces representative current stress, offering a practical and hardware-minimal solution for DSM loading tests.</p>

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Hardware-minimal arm-current stress test for double half-bridge submodules in modular multilevel converters

  • 期刊论文

  • 出版模式：

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  • 发表日期：

    2026年4月13日

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  • Seung-Yong Lee,
  • Da-Yae Yoon,
  • Donghwan Lee,
  • Shenghui Cui,
  • Sanghyun Kim,
  • Jae-Jung Jung

摘要

The double submodule (DSM), which integrates two series-connected half-bridges within a single submodule, has gained attention as a compact and space-efficient building block for the modular multilevel converters (MMCs) used in constrained environments such as urban power-conversion stations and electric ship propulsion systems. Reliable DSM operation must be verified under realistic loading conditions. However, existing submodule (SM) test approaches, including mission profile emulations (MPEs) and power-hardware-in-the-loop simulations (PHILS), are unsuitable for DSMs. When applied to DSMs, these approaches require a high-voltage power amplifier with an output capability exceeding twice the dc rating of an equivalent single SM, which significantly increases implementation complexity. This paper proposes a DSM-based loading-test method that eliminates the need for an auxiliary high-voltage power amplifier. Two DSMs are interconnected through an interface inductor to synthesize arm-current-shaped waveforms, while an auxiliary dc source compensates only the energy loss to sustain operation. Experimental results obtained from laboratory-scale DSM hardware demonstrate that the proposed method reproduces representative current stress, offering a practical and hardware-minimal solution for DSM loading tests.