<p>A novel SiC hybrid channel MOSFET (HC-MOSFET) is proposed in this paper. As the challenges associated with the size scaling of traditional planar MOSFET (P-MOSFET) become increasingly significant, the HC-MOSFET increases the channel density by introducing a new conductive channel on the sidewall of the gate, and realizes a reduction of specific on-resistance. The traditional trench MOSFET (T-MOSFET) has the characteristics of compact size and high channel density. However, when the T-MOSFET is in the high-voltage blocking state, the gate oxide layer is subjected to a significant electric field. The HC-MOSFET achieves a lower on-resistance and a reduced gate oxide electric field in the off-state. At the gate corner oxide of the HC-MOSFET, the top P-channel region, bottom P-base region, and surrounding P + regions are used to effectively shield the electric field and reduce the maximum electric field at the gate corner oxide to below 1 MV/cm. Additionally, the HC-MOSFET exhibits the lowest reverse transfer capacitance (C<sub>rss</sub>), which reduces switching losses and achieves the lowest C<sub>rss</sub> × R<sub>on</sub> figure of merit among the three kinds of devices.</p>

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SiC hybrid channel MOSFET with low ON-resistance and low OFF-state oxide field

  • Yawei He,
  • Ling Sang,
  • Feng He,
  • Xiping Niu,
  • Xinyu Li,
  • Shaohua Dong,
  • Xiamin Hao,
  • Zheyang Li,
  • Rui Jin

摘要

A novel SiC hybrid channel MOSFET (HC-MOSFET) is proposed in this paper. As the challenges associated with the size scaling of traditional planar MOSFET (P-MOSFET) become increasingly significant, the HC-MOSFET increases the channel density by introducing a new conductive channel on the sidewall of the gate, and realizes a reduction of specific on-resistance. The traditional trench MOSFET (T-MOSFET) has the characteristics of compact size and high channel density. However, when the T-MOSFET is in the high-voltage blocking state, the gate oxide layer is subjected to a significant electric field. The HC-MOSFET achieves a lower on-resistance and a reduced gate oxide electric field in the off-state. At the gate corner oxide of the HC-MOSFET, the top P-channel region, bottom P-base region, and surrounding P + regions are used to effectively shield the electric field and reduce the maximum electric field at the gate corner oxide to below 1 MV/cm. Additionally, the HC-MOSFET exhibits the lowest reverse transfer capacitance (Crss), which reduces switching losses and achieves the lowest Crss × Ron figure of merit among the three kinds of devices.