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<p>The sixth-generation (6G) wireless networks must support Ultra-Reliable Low-Latency Communication (URLLC), massive Machine-Type Communication (mMTC), enhanced Mobile Broadband to IoT (eMBB-IoT), and best-effort traffic, with radically different Quality-of-Service (QoS) requirements. Current designs of adaptive network coding OS couple window adaptation to a single congestion controller or provide a standardized coding policy to all traffic classes, leaving much performance headroom unutilized. In this paper, a new Deep Learning-based framework called DL-CCSW-RLNC, based on a Color-Coded Sliding-Window Random Linear Network Coding is proposed that allocates four priority color codes to the IoT flows (RED (URLLC), AMBER (mMTC), GREEN (eMBB-IoT), and BLUE (Best-Effort)) and jointly adjusts the per-class coding parameters via an agent based on either a PPO-LSTM or SAC-LSTM framework with a common LSTM encoder to provide temporal channel context. The state space captures instantaneous packet loss rate, end-to-end delay, bandwidth, RTT, and traffic priority mix; the reward function is formally decomposed into class-specific throughput, delay, and coding complexity terms with color-adaptive weights. Seven simulation experiments over a Rayleigh/Nakagami-fading 6G channel with Gauss-Markov mobility demonstrate: (1) up to 9× lower in-order delivery delay versus block-based RLNC (relative reduction, measured at PLR = 20%); (2) URLLC PDR ≥ 99.999% sustained throughout congestion events where fixed-window schemes degrade to 96.1%; (3) real-time coding-rate adaptation within ~ 40 slots of a 1%→15% PLR spike; (4) normalized goodput gains of 4–32% over all baselines (relative improvement, PLR range 1%–45%); and (5) convergence in ~ 200 training episodes. The framework is designed for deployment as an O-RAN xApp within the near-real-time RIC, with policy inference latency of 0.3–1.2 ms on ARM Cortex-A72.</p>

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DL-CCSW-RLNC-—A Deep Reinforcement Learning–Driven Color-Coded Sliding-Window Random Linear Network Coding Framework for 6G IoT Traffic

  • 期刊论文

  • 发表日期：

    2026年5月27日

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  • C. Usharani,
  • P. Udayakumar,
  • A. N. Ramya Shree,
  • J. Refonaa,
  • S. Sridevi,
  • Leena Sivaguru

摘要

The sixth-generation (6G) wireless networks must support Ultra-Reliable Low-Latency Communication (URLLC), massive Machine-Type Communication (mMTC), enhanced Mobile Broadband to IoT (eMBB-IoT), and best-effort traffic, with radically different Quality-of-Service (QoS) requirements. Current designs of adaptive network coding OS couple window adaptation to a single congestion controller or provide a standardized coding policy to all traffic classes, leaving much performance headroom unutilized. In this paper, a new Deep Learning-based framework called DL-CCSW-RLNC, based on a Color-Coded Sliding-Window Random Linear Network Coding is proposed that allocates four priority color codes to the IoT flows (RED (URLLC), AMBER (mMTC), GREEN (eMBB-IoT), and BLUE (Best-Effort)) and jointly adjusts the per-class coding parameters via an agent based on either a PPO-LSTM or SAC-LSTM framework with a common LSTM encoder to provide temporal channel context. The state space captures instantaneous packet loss rate, end-to-end delay, bandwidth, RTT, and traffic priority mix; the reward function is formally decomposed into class-specific throughput, delay, and coding complexity terms with color-adaptive weights. Seven simulation experiments over a Rayleigh/Nakagami-fading 6G channel with Gauss-Markov mobility demonstrate: (1) up to 9× lower in-order delivery delay versus block-based RLNC (relative reduction, measured at PLR = 20%); (2) URLLC PDR ≥ 99.999% sustained throughout congestion events where fixed-window schemes degrade to 96.1%; (3) real-time coding-rate adaptation within ~ 40 slots of a 1%→15% PLR spike; (4) normalized goodput gains of 4–32% over all baselines (relative improvement, PLR range 1%–45%); and (5) convergence in ~ 200 training episodes. The framework is designed for deployment as an O-RAN xApp within the near-real-time RIC, with policy inference latency of 0.3–1.2 ms on ARM Cortex-A72.