An Improved Space Vector Pulse Width Modulation Strategy with Carrier Based Execution for Three Level Simplified Neutral Point Clamped Inverter
摘要
The three-level simplified neutral point clamped (3 L-SNPC) inverter has played an important role in industrial field throughout its development. Comparing to the conventional three-level neutral point clamped (3 L-NPC) inverter, the 3 L-SNPC also generates a three-level output voltage that require only ten power semiconductor switches. However, due to its asymmetrical structure, the control of this inverter becomes relatively complex, necessitating the use of advanced control hardware such as a field programmable gate array (FPGA). This paper presents an improved space vector pulse width modulation (SVPWM) technique that can be implemented on a digital signal processor (DSP). In addition to contributing to the simplification of the control circuit the 3 L-SNPC inverter, the proposed modulation technique also plays a significant role in reducing the total harmonic distortion (THD) of the output waveform. The effectiveness of the proposed algorithm will be demonstrated through both simulation and experimental results.