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<p>This paper introduces a novel current-based Space Vector Discontinuous Pulse Width Modulation (SVDPWM) strategy, named OP1-SVDPWM, designed for Four-Level Neutral Point Clamped (4L-NPC) inverters. The proposed technique targets both switching loss reduction and mitigation of common-mode voltage (RCMV). It achieves this by transforming the space vector PWM of the four-level inverter into an equivalent two-level form. Furthermore, a three-level common-mode voltage discontinuous modulation is implemented by employing the nearest redundant RCMV vectors. OP1-SVDPWM adaptively selects the discontinuous PWM (DPWM) mode that avoids switching at the highest current levels. Besides, the nearest three vector principle enables a reduction of output voltage and current harmonic distortion. Simulation results demonstrate that OP1-SVDPWM reduces switching losses by up to 20% compared with SVDPWM0 and SVDPWM1, and by up to 50% compared with SPWM and AZCMV PWM techniques under specific conditions. The effectiveness of the proposed method has been validated through both simulation and experimental results.</p>

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Current-Based SVDPWM with Reduced Common-Mode Voltage for Switching Loss Minimization in Four-Level NPC Inverters

  • 期刊论文

  • 发表日期：

    2026年2月4日

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  • Le Nam Pham,
  • Quoc Dung Phan,
  • Van Nho Nguyen

摘要

This paper introduces a novel current-based Space Vector Discontinuous Pulse Width Modulation (SVDPWM) strategy, named OP1-SVDPWM, designed for Four-Level Neutral Point Clamped (4L-NPC) inverters. The proposed technique targets both switching loss reduction and mitigation of common-mode voltage (RCMV). It achieves this by transforming the space vector PWM of the four-level inverter into an equivalent two-level form. Furthermore, a three-level common-mode voltage discontinuous modulation is implemented by employing the nearest redundant RCMV vectors. OP1-SVDPWM adaptively selects the discontinuous PWM (DPWM) mode that avoids switching at the highest current levels. Besides, the nearest three vector principle enables a reduction of output voltage and current harmonic distortion. Simulation results demonstrate that OP1-SVDPWM reduces switching losses by up to 20% compared with SVDPWM0 and SVDPWM1, and by up to 50% compared with SPWM and AZCMV PWM techniques under specific conditions. The effectiveness of the proposed method has been validated through both simulation and experimental results.