High-Precision Voltage Balancer for Series-Connected SiC MOSFETs Application

In order to meet the requirements of high-voltage devices, it is common to connect low-voltage devices in series. However, mismatch in the physical parameters of the devices, asynchronous gate drive signals and parasitic capacitance can lead to voltage unbalance in the turn-off state. This paper proposes a high-precision voltage balancer for series-connected silicon carbide (SiC) MOSFETs application, which is implemented by logic elements carry delay line and can achieve ps-level delay resolution. By adjusting the time delay of the gate driver turn-off signal, the voltage unbalance caused by the signal asynchronization and difference in device parameters between the two gate drivers can be eliminated, ensuring high-precision voltage balance. A detailed analysis of the high-precision voltage balancer mechanism and its Field-Programmable Gate Array (FPGA) implementation is provided. The resolution of the delay time step represents a critical factor influencing the accuracy of voltage balance. Experimental results demonstrated that the high-precision driving signal time delay method proposed in this paper was effective in reducing the voltage imbalance to less than 3%, and exhibited a superior voltage balance effect compared to the traditional drive signal time delay method. The results indicated that the innovative approach not only significantly enhanced the voltage balancing capabilities for series-connected SiC MOSFETs but also maintained the switching speed and efficiency.