High-performance matrix multiplication micro-kernel generation for GPDSPs via MLIR progressive lowering
摘要
Achieving high performance for matrix multiplication (GEMM) remains critical in high-performance computing (HPC) and machine learning (ML). As core computational components, micro-kernels determine GEMM efficiency but face challenges in development cost and hardware adaptability—especially on modern General-Purpose DSPs (GPDSPs) with VLIW and SIMD architectures. Existing automatic micro-kernel generation methods on DSP platforms either suffer from suboptimal performance due to general compiler backend limitations or face challenges in handling complex VLIW instruction scheduling and cross-platform adaptability. This paper proposes MAGGIE, an MLIR-based automatic micro-kernel generation approach for GPDSPs that uses a progressive lowering design at two levels: generic optimization (i.e., algorithmic transformations and intermediate code optimization) and backend specialization (i.e., DSP-specific instruction scheduling and memory access fusion). Experimental results on the FT-M7032 DSP platform demonstrate that automatically generated micro-kernels achieve a peak efficiency of 99.2%, comparable to that of expert-crafted assembly code. This method significantly reduces development costs while improving performance portability.