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<p>The present article describes an exhaustive simulation and analysis of an innovative Gate-All-Around Field-Effect Transistor (GAAFET) with a cylindrical nanowire structure that is optimized for future semiconductor technology. The heterostructure channel device proposed includes silicon and germanium layers with improved carrier mobility and electrostatic integrity. A dual-metal gate structure (TiN and aluminum) with engineered workfunctions (4.53 eV and 4.1 eV) provides accurate threshold voltage tuning, while an asymmetric doping profile–encompassing halo-like source-side doping and graded drain junctions–efficiently suppresses short-channel effects. The high-K <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(HfO_{2}\)</EquationSource> </InlineEquation> gate dielectric provides strong gate control with low leakage, essential for low-power applications. This work provides key insights into the design and optimization of GAAFETs, highlighting the synergistic benefits of heterostructure channels, dual-metal gates, and 3D electrostatics for future CMOS scaling. The proposed structure offers a promising pathway for high-performance, energy-efficient transistors in advanced integrated circuits.</p>

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Metal-Pair Engineered Cylindrical GAAFET with Asymmetric Doping for Enhanced Performance

  • 期刊论文

  • 发表日期：

    2025年6月17日

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  • J. Leela Mahendra Kumar,
  • D. Satyanarayana

摘要

The present article describes an exhaustive simulation and analysis of an innovative Gate-All-Around Field-Effect Transistor (GAAFET) with a cylindrical nanowire structure that is optimized for future semiconductor technology. The heterostructure channel device proposed includes silicon and germanium layers with improved carrier mobility and electrostatic integrity. A dual-metal gate structure (TiN and aluminum) with engineered workfunctions (4.53 eV and 4.1 eV) provides accurate threshold voltage tuning, while an asymmetric doping profile–encompassing halo-like source-side doping and graded drain junctions–efficiently suppresses short-channel effects. The high-K \(HfO_{2}\) gate dielectric provides strong gate control with low leakage, essential for low-power applications. This work provides key insights into the design and optimization of GAAFETs, highlighting the synergistic benefits of heterostructure channels, dual-metal gates, and 3D electrostatics for future CMOS scaling. The proposed structure offers a promising pathway for high-performance, energy-efficient transistors in advanced integrated circuits.