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<p>This paper presents an ultra-low-power, area-efficient Analog Front End (AFE) for accurate and long-term neural recording applications. The AFE operates over a 0.5–100&#xa0;Hz bandwidth, precisely matching the frequency range of EEG signals. The Proposed AFE benefits from a novel Instrumentation Amplifier (IA) in the first stage, which is robust against process, voltage and temperature (PVT) variations. The proposed IA achieves a low power consumption of only 188.4 nW while maintaining high noise–power efficiency. A body-driven tail-less (BDTL) programmable gain amplifier (PGA) is used to control the gain of the system. Input referred noise of the AFE is reached <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(360\,nV/\sqrt {Hz}\)</EquationSource> </InlineEquation> at 1&#xa0;Hz due to using chopper stabilization in the IA, also a Gm-C filter is used to suppress the out-of-band components. The Gm reduction technique is utilized for the Gm-C filter, ensuring it is compatible with the EEG signal bandwidth. The DC Servo Loop (DSL) is used in the first stage to form a high-pass corner frequency and suppress electrode DC offset. The input Impedance is reached to <InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(1G\Omega\)</EquationSource> </InlineEquation> due to using the Impedance Boosting Loop (IBL) in the IA. The proposed AFE draws only 313.7 nA current from a single-rail 0.8-V supply. The CMRR Monte-Carlo distribution of the AFE has a mean value of 82.8 dB, which can reject common-mode noise and interferers very well. The occupied area of the AFE is <InlineEquation ID="IEq3"> <EquationSource Format="TEX">\(0.19m{m^2}\)</EquationSource> </InlineEquation>. The AFE is designed and simulated in 65&#xa0;nm CMOS technology node with post layout verification.</p>

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A 0.8-V, 250-nW Analog Front End Based on a Robust Chopper-Stabilized Instrumentation Amplifier for Long-Term Neural Recording Applications

  • 期刊论文

  • 发表日期：

    2026年5月22日

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  • Ali Parhizgar,
  • Ebrahim Abiri,
  • Kourosh Hassanli

摘要

This paper presents an ultra-low-power, area-efficient Analog Front End (AFE) for accurate and long-term neural recording applications. The AFE operates over a 0.5–100 Hz bandwidth, precisely matching the frequency range of EEG signals. The Proposed AFE benefits from a novel Instrumentation Amplifier (IA) in the first stage, which is robust against process, voltage and temperature (PVT) variations. The proposed IA achieves a low power consumption of only 188.4 nW while maintaining high noise–power efficiency. A body-driven tail-less (BDTL) programmable gain amplifier (PGA) is used to control the gain of the system. Input referred noise of the AFE is reached \(360\,nV/\sqrt {Hz}\) at 1 Hz due to using chopper stabilization in the IA, also a Gm-C filter is used to suppress the out-of-band components. The Gm reduction technique is utilized for the Gm-C filter, ensuring it is compatible with the EEG signal bandwidth. The DC Servo Loop (DSL) is used in the first stage to form a high-pass corner frequency and suppress electrode DC offset. The input Impedance is reached to \(1G\Omega\) due to using the Impedance Boosting Loop (IBL) in the IA. The proposed AFE draws only 313.7 nA current from a single-rail 0.8-V supply. The CMRR Monte-Carlo distribution of the AFE has a mean value of 82.8 dB, which can reject common-mode noise and interferers very well. The occupied area of the AFE is \(0.19m{m^2}\) . The AFE is designed and simulated in 65 nm CMOS technology node with post layout verification.