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<p>Aggressive scaling of complementary metal-oxide-semiconductor (CMOS) technology has gradually unveiled underlying limitations, such as short-channel effects and increased power dissipation with decreasing voltage. These limitations have led to the exploration of alternative device technologies that can ensure energy-efficient operation with reliable performance. In this direction, the electrical characteristics of carbon nanotube field-effect transistors (CNTFETs) are quite promising. The threshold voltage can be modulated based on the diameter of the nanotube, thereby enabling the implementation of multivalued logic circuits. In this paper, the authors propose the implementation of an exact and approximate ternary multiplier (TMUL) architecture based on 32-nanometer technology nodes of CNTFETs. The implementation is targeted towards energy-efficient image processing applications. The use of ternary logic reduces interconnect complexity, thereby improving data transfer efficiency. The proposed design of the exact TMUL shows superior propagation delay and power performance compared to previous works. The design reduces propagation delay by 4.23%, increases power efficiency by 37.78%, and reduces overall energy consumption by 12.56%, thereby improving the energy-delay product and energy-transistor count product. The authors propose an approximate version of the TMUL architecture to ensure reliable performance in error-tolerant applications. Although the design shows compromised numerical accuracy in certain input scenarios, the quality of the output is within acceptable limits. The design shows a normalized error distance of <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(\:0.21\times\:{10}^{-4}\)</EquationSource> </InlineEquation> with a peak signal-to-noise ratio ranging from 30 dB to 35 dB during image multiplication experiments. The Monte Carlo simulations performed to ensure reliable operation under process, voltage, and temperature variations demonstrate the suitability of the proposed design.</p>

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Exact and Inexact Ternary Multipliers for Energy-Efficient Image Processing Applications with 32-nm CNTFETs

  • 期刊论文

  • 发表日期：

    2026年4月24日

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  • Nalubolu Geetha Rani,
  • Morasa Balaji,
  • Shaik Javid Basha,
  • Ashish Sachdeva,
  • Erfan Abbasian

摘要

Aggressive scaling of complementary metal-oxide-semiconductor (CMOS) technology has gradually unveiled underlying limitations, such as short-channel effects and increased power dissipation with decreasing voltage. These limitations have led to the exploration of alternative device technologies that can ensure energy-efficient operation with reliable performance. In this direction, the electrical characteristics of carbon nanotube field-effect transistors (CNTFETs) are quite promising. The threshold voltage can be modulated based on the diameter of the nanotube, thereby enabling the implementation of multivalued logic circuits. In this paper, the authors propose the implementation of an exact and approximate ternary multiplier (TMUL) architecture based on 32-nanometer technology nodes of CNTFETs. The implementation is targeted towards energy-efficient image processing applications. The use of ternary logic reduces interconnect complexity, thereby improving data transfer efficiency. The proposed design of the exact TMUL shows superior propagation delay and power performance compared to previous works. The design reduces propagation delay by 4.23%, increases power efficiency by 37.78%, and reduces overall energy consumption by 12.56%, thereby improving the energy-delay product and energy-transistor count product. The authors propose an approximate version of the TMUL architecture to ensure reliable performance in error-tolerant applications. Although the design shows compromised numerical accuracy in certain input scenarios, the quality of the output is within acceptable limits. The design shows a normalized error distance of \(\:0.21\times\:{10}^{-4}\) with a peak signal-to-noise ratio ranging from 30 dB to 35 dB during image multiplication experiments. The Monte Carlo simulations performed to ensure reliable operation under process, voltage, and temperature variations demonstrate the suitability of the proposed design.