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<p>The effect of single event transient on hetero Junctionless Tunnel Field Effect Transistor (HJLTFET) is explored in this study. A 20&#xa0;nm HJLTFET is designed using silicon for the channel and drain regions and various materials, Gallium Arsenide (GaAs), Gallium Nitride, Silicon Germanium (SiGe) and Indium Arsenide (InAs) are used for source regions. HJLTFET based 6T SRAM circuits are developed from Verilog A code using the look up table method. The stability of the circuits is assessed by read static noise margin (RSNM) and write static noise margin (WSNM). The radiation effect is modelled by a current source striking the sensitive output node of the circuits. Under radiation strike, single event upset (SEU) is observed which changes the functionality of the memory cell. The mitigation of SEU is performed with an additional RC network between two cross coupled inverters. The performance of the circuit, before and after radiation strike is compared using the metrics, write delay, read delay and the circuit’s power consumption. It can be observed that Si/GaAs based 6T SRAM shows higher RSNM and WSNM whereas InAs based 6T SRAM shows lesser RSNM and WSNM. In terms of recovery time, it can be noticed that SiGe recovers 3.07% faster than GaAs and 44.84% faster than InAs based 6T SRAM cell.</p>

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Investigation of Single Event Upset and Its Mitigation in Hetero Junctionless Tunnel FET SRAM Cell

  • 期刊论文

  • 发表日期：

    2025年4月21日

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  • K. Aishwarya,
  • B. Lakshmi

摘要

The effect of single event transient on hetero Junctionless Tunnel Field Effect Transistor (HJLTFET) is explored in this study. A 20 nm HJLTFET is designed using silicon for the channel and drain regions and various materials, Gallium Arsenide (GaAs), Gallium Nitride, Silicon Germanium (SiGe) and Indium Arsenide (InAs) are used for source regions. HJLTFET based 6T SRAM circuits are developed from Verilog A code using the look up table method. The stability of the circuits is assessed by read static noise margin (RSNM) and write static noise margin (WSNM). The radiation effect is modelled by a current source striking the sensitive output node of the circuits. Under radiation strike, single event upset (SEU) is observed which changes the functionality of the memory cell. The mitigation of SEU is performed with an additional RC network between two cross coupled inverters. The performance of the circuit, before and after radiation strike is compared using the metrics, write delay, read delay and the circuit’s power consumption. It can be observed that Si/GaAs based 6T SRAM shows higher RSNM and WSNM whereas InAs based 6T SRAM shows lesser RSNM and WSNM. In terms of recovery time, it can be noticed that SiGe recovers 3.07% faster than GaAs and 44.84% faster than InAs based 6T SRAM cell.