High-Efficiency DC–DC Buck Converter with Improved PWM Generator in CMOS Technology

This article proposes an improved step-down DC–DC converter, the primary aim of which is to reduce power consumption and thus increase efficiency. Buck converters also reach a voltage lower than the input voltage. In order to use this converter to control the speed of DC motors, optimization has been done in the PWM section and the transistor circuit. Since the basis of the operation of these converters is switching, the output voltage will have harmonics, and to solve this problem, a low-pass filter consisting of an inductor as well as a capacitor has been used. The final results show that with an input voltage of 12 Volts, an output voltage of 1 Volt has been reached, the output current is 10 A, and the efficiency is 92%. Due to their high values, the inductors and capacitors used in this article are added externally to the chip. Placing the inductor and capacitor outside in this article has reduced the effects of noise and optimal use of chip space. The frequency value is considered as a trade-off between size and efficiency. The ripple voltage is 25 mV, and the simulation and conclusions have been made in 0.5 µm CMOS technology. The proposed design has high reliability in different conditions and low energy consumption along with high output power.