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<p>FinFETs have gained immense popularity in the latest processors of leading semiconductor companies owing to its three-dimensional structure and better control over channel, which results in improved short channel performance. The proposed work demonstrates the performance of FinFET with spacers on both sides of channel along source and drain side at 10&#xa0;nm gate length and other specific parameters with substrate as silicon-on-insulator (SOI). For given boundary conditions and carrier transport as well as mobility models, designed device was simulated and performance metrics such as off-current (<i>I</i><sub><i>off</i></sub>), drive current, on-off current ratio, and sub-threshold swing (<i>SS</i>) were extracted. Impact of variable fin dimensions such fin height, fin width along with dielectric value of high-k spacer material has been investigated. Performance of designed FinFET with low-k/high-k dual spacer has been optimized via trained neural network and artificial hummingbird optimization algorithm in MATLAB framework. Optimum values of fin height, fin width and spacer dielectric obtained through bio-inspired algorithm are 20&#xa0;nm, 7&#xa0;nm and 20 respectively. Performance results obtained after optimization process in MATLAB are in close agreement with the results acquired in TCAD when optimized fin width, fin height and spacer dielectric were used for device design.</p>

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Optimized Design of Dual-k Spacer FinFET Using Bio-Inspired Artificial Hummingbird Algorithm at 10 nm Gate Length

  • 期刊论文

  • 发表日期：

    2025年8月5日

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  • Navneet Kaur,
  • Chahat Jain,
  • Munish Rattan

摘要

FinFETs have gained immense popularity in the latest processors of leading semiconductor companies owing to its three-dimensional structure and better control over channel, which results in improved short channel performance. The proposed work demonstrates the performance of FinFET with spacers on both sides of channel along source and drain side at 10 nm gate length and other specific parameters with substrate as silicon-on-insulator (SOI). For given boundary conditions and carrier transport as well as mobility models, designed device was simulated and performance metrics such as off-current (Ioff), drive current, on-off current ratio, and sub-threshold swing (SS) were extracted. Impact of variable fin dimensions such fin height, fin width along with dielectric value of high-k spacer material has been investigated. Performance of designed FinFET with low-k/high-k dual spacer has been optimized via trained neural network and artificial hummingbird optimization algorithm in MATLAB framework. Optimum values of fin height, fin width and spacer dielectric obtained through bio-inspired algorithm are 20 nm, 7 nm and 20 respectively. Performance results obtained after optimization process in MATLAB are in close agreement with the results acquired in TCAD when optimized fin width, fin height and spacer dielectric were used for device design.