The rapid growth of the Internet of Things (IoT) emphasizes the need for secure data transmission between IoT devices and edge computing. Many IoT systems utilize asymmetric cryptography, particularly elliptic curve cryptography (ECC), which is favored in resource-constrained environments for its efficient encryption and smaller key sizes. ECC-based protocols and Diffie-Hellman (DH) key agreement schemes are integral to edge computing.WolfSSL is an efficient SSL library with a significantly smaller memory footprint, optimized for IoT and embedded systems, and supports ECC and DH public key options for over 2 billion devices daily. This study evaluates processor extensions and instruction customization within WolfSSL’s benchmark code to enhance ECC and DH performance. We dissect the implementation into key routines such as Montgomery reduction and multiplication, recommending processor hardware extensions and software modifications to improve computational speed. Our analysis covers various processor designs, from single-issue base processors to multi-issue configurations with custom instructions, revealing performance trade-offs. Our results indicate that our designs outperform the most optimized WolfSSL software implementations on base RISC processors, achieving speedups of up to \(\{6.25x, 4.2x\}\) for ECC and \(\{5.6x, 3.9x\}\) for DH algorithms. Moreover, comparing our work to architectures like ARM6/8 and RISC-V platforms shows significant performance improvements. These advancements not only enhance ECC and DH operations but also benefit various Post-Quantum Cryptography (PQC) primitives. Our findings achieve significant speed improvements for Montgomery reduction and point multiplication while maintaining minimal area cost, making them advantageous for applications using lattice-based and code-based PQC algorithms.
