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<p>A fixed length tweakable enciphering scheme (TES) is the appropriate cryptographic functionality for low level disk encryption. Research on TES over the last two decades have led to a number of proposals, some of which have been implemented using field programmable gate arrays (FPGAs). This paper considers FPGA implementations targeted at disks supporting 4096-byte sectors. We choose two schemes, namely AEZ and FAST, for implementation and provide detailed rationale for our choice. The relevant architectures are described and simulation results on the Xilinx Virtex 5 and Virtex 7 FPGAs are presented. For comparison, we consider previous implementation of the IEEE standard EME2. The results indicate that FAST outperforms the other schemes.</p>

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Implementations of FAST and AEZ on field programmable gate arrays for low level encryption of disks with 4096-byte sectors

  • 期刊论文

  • 发表日期：

    2025年11月6日

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  • Debrup Chakraborty,
  • Sebati Ghosh,
  • Cuauhtemoc Mancillas López,
  • Palash Sarkar

摘要

A fixed length tweakable enciphering scheme (TES) is the appropriate cryptographic functionality for low level disk encryption. Research on TES over the last two decades have led to a number of proposals, some of which have been implemented using field programmable gate arrays (FPGAs). This paper considers FPGA implementations targeted at disks supporting 4096-byte sectors. We choose two schemes, namely AEZ and FAST, for implementation and provide detailed rationale for our choice. The relevant architectures are described and simulation results on the Xilinx Virtex 5 and Virtex 7 FPGAs are presented. For comparison, we consider previous implementation of the IEEE standard EME2. The results indicate that FAST outperforms the other schemes.