An FPGA-Based Balancing of Capacitor Voltage for a Five-Level CHB Inverter

This paper presents a unique five-level inverter consisting of one DC voltage source and one capacitor. Here the capacitor acts like another source and is fed to the inverter along with the DC voltage source. The DC voltage source is also used to charge the capacitor with the help of an additional switch used inside the converter circuit. An inductor is used in the charging path to reduce the peak of the charging current. The in-phase disposition sinusoidal pulse-width modulation technique is used to generate the gate pulse for the devices of the presented converter. The proposed topology operates in two modes. One is energy stored mode and another is energy release mode. By using both modes of operation, the additional switch is triggered to charge the capacitor. The capacitor’s charging and discharging mode and inverter power loss have been described thoroughly in this paper. The proposed five-level inverter topology has been developed and verified inside the laboratory. The controller of the converter has been implemented in the FPGA platform. The experimental results are obtained to evaluate the efficacy of the proposed inverter.