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<p>Aggressive CMOS scaling requires advanced architectures and optimized dielectrics to suppress short-channel effects while limiting leakage. This work employs an integrated methodology combining analytical models with 3D finite-element simulations to benchmark SiO₂, high-κ HfO₂ and ZrO₂, and graphene oxide (GO) in FinFETs. Results reveal that conventional SiO₂ offers weak electrostatic control, with a subthreshold swing (<i>SS</i>) of 67.6&#xa0;mV/dec, threshold voltage degradation over 60% under DIBL, and limited transconductance of 454.97 μS at 20&#xa0;nm. In contrast, high-κ dielectrics demonstrate significant advantages. HfO₂ achieves an on-current of 1.642&#xa0;mA and the highest <i>g</i><sub><i>m</i></sub>, making it highly suited for performance-driven applications. ZrO₂ exhibits exceptional leakage suppression with an <i>I</i><sub><i>on</i></sub><i>/I</i><sub><i>off</i></sub> ratio of 3.22 × 10<sup>13</sup>, while maintaining <i>SS</i> ≈ 60.5&#xa0;mV/dec and strong threshold stability, positioning it as the best choice for ultra-low-power systems. GO shows moderate improvements over SiO₂ but underperforms compared to high-κ oxides. The analytical framework captures velocity saturation and DIBL, while simulations highlight oxide-capacitance-driven scaling. Collectively, the findings establish a clear materials roadmap: ZrO₂ for energy-efficient low-leakage FinFETs, HfO₂ for high-performance computing, and GO as a transitional alternative. This study demonstrates the critical role of dielectric engineering in enabling energy-efficient and scalable FinFET nodes.</p>

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Impact of High-κ and Novel Gate Oxides on FinFET Performance: A Multi-Parameter Modeling Approach

  • 期刊论文

  • 发表日期：

    2026年7月17日

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  • Vivek Rai,
  • Ravi Ranjan Kumar,
  • Kanjalochan Jena,
  • Deepak Punetha

摘要

Aggressive CMOS scaling requires advanced architectures and optimized dielectrics to suppress short-channel effects while limiting leakage. This work employs an integrated methodology combining analytical models with 3D finite-element simulations to benchmark SiO₂, high-κ HfO₂ and ZrO₂, and graphene oxide (GO) in FinFETs. Results reveal that conventional SiO₂ offers weak electrostatic control, with a subthreshold swing (SS) of 67.6 mV/dec, threshold voltage degradation over 60% under DIBL, and limited transconductance of 454.97 μS at 20 nm. In contrast, high-κ dielectrics demonstrate significant advantages. HfO₂ achieves an on-current of 1.642 mA and the highest gm, making it highly suited for performance-driven applications. ZrO₂ exhibits exceptional leakage suppression with an Ion/Ioff ratio of 3.22 × 1013, while maintaining SS ≈ 60.5 mV/dec and strong threshold stability, positioning it as the best choice for ultra-low-power systems. GO shows moderate improvements over SiO₂ but underperforms compared to high-κ oxides. The analytical framework captures velocity saturation and DIBL, while simulations highlight oxide-capacitance-driven scaling. Collectively, the findings establish a clear materials roadmap: ZrO₂ for energy-efficient low-leakage FinFETs, HfO₂ for high-performance computing, and GO as a transitional alternative. This study demonstrates the critical role of dielectric engineering in enabling energy-efficient and scalable FinFET nodes.