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<p>Circular layout Transistors provide an effective approach to mitigating short-channel effects (SCEs) in advanced technology nodes. This study explores the design and simulation of Circular Double Gate Transistors (CDGTs) and Circular Stacked Nanosheet Transistors (CSNTs) for high-performance (HP) applications at a 10&#xa0;nm gate length. The devices were designed using gds2mesh process and evaluated through fully calibrated TCAD simulations to analyze both DC and analog/RF performance. The CSNT exhibited superior DC characteristics, achieving the highest ON-state drive current (I<sub>ON</sub>) of 2.27 × 10<sup>–3</sup> A and the lowest OFF-state leakage current (I<sub>OFF</sub>) of 5.38 × 10<sup>–9</sup> A. Furthermore, it demonstrated an impressive switching ratio (I<sub>ON</sub>/I<sub>OFF</sub>) of 4.23 × 10<sup>5</sup>, marking a 3.7 × improvement over the CDGT. The CSNT also outperformed the CDGT in analog/RF performance, reinforcing its potential for next-generation nanoelectronic applications. These findings establish CSNTs as promising candidates for future transistor architectures, offering enhanced scalability and performance in advanced semiconductor technologies.</p>

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Enhancing Device Performance with Circular Layout Transistors: A Comparative Study of CDGT and CSNT

  • 期刊论文

  • 发表日期：

    2025年7月16日

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  • Sagar Kallepelli,
  • Satish Maheshwaram,
  • Kiran Kumar P.

摘要

Circular layout Transistors provide an effective approach to mitigating short-channel effects (SCEs) in advanced technology nodes. This study explores the design and simulation of Circular Double Gate Transistors (CDGTs) and Circular Stacked Nanosheet Transistors (CSNTs) for high-performance (HP) applications at a 10 nm gate length. The devices were designed using gds2mesh process and evaluated through fully calibrated TCAD simulations to analyze both DC and analog/RF performance. The CSNT exhibited superior DC characteristics, achieving the highest ON-state drive current (ION) of 2.27 × 10–3 A and the lowest OFF-state leakage current (IOFF) of 5.38 × 10–9 A. Furthermore, it demonstrated an impressive switching ratio (ION/IOFF) of 4.23 × 105, marking a 3.7 × improvement over the CDGT. The CSNT also outperformed the CDGT in analog/RF performance, reinforcing its potential for next-generation nanoelectronic applications. These findings establish CSNTs as promising candidates for future transistor architectures, offering enhanced scalability and performance in advanced semiconductor technologies.