Investigation of Analog/RF behaviour of Asymmetrical Gate Tunnel FET at Cryogenic temperatures

This paper extensively sheds light on the performance of an Asymmetrical-gate Tunnel FET (A-TFET) under cryogenic temperatures (< 78 K) in terms of DC, Analog, and RF metrics. SILVACO ATLAS TCAD is implemented to invoke the device physics and subsequently characterize the lattice temperature parameters for facilitating the carrier transport in terms of device transfer characteristics, I_ON/I_OFF ratio, subthreshold swing (SS). Steep profiles for I_ON/I_OFF ratio and SS are observed at cryogenic temperatures representing superior device performance. Furthermore, the transconductance (g_m) and transconductance generation factor (TGF) profiles are thoroughly investigated as a part of analog analysis while RF metrics like the transistor parasitic capacitances and cut-off frequency are investigated as well. The real-time fabrication complexity in terms of presence of interface traps for a damaged device has been compared with a fresh device with absence of interface traps in terms of transfer characteristics and g_m at cryogenic and ambient temperatures thereby ensuring the CMOS compatibility of the A-TFET for quantum computing.