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<p>The main challenge in all-optical computing is the realization of compact, fast, and energy-efficient logic devices. Flip-flops, the essential elements of sequential logic, are typically limited in size as well as diffraction constraints in electronic or purely photonic systems. To overcome these limitations, this study proposes a nanoscale plasmonic sequential logic circuit capable of implementing four fundamental flip-flops (D, T, JK, and SR) within a single insulator–metal–insulator (IMI) multilayer structure operating at 1550&#xa0;nm, with two output ports, Q<sub>n</sub> and Q<sub>n</sub><sup>\</sup>. The design employs surface plasmon polaritons (SPPs) to achieve subwavelength light confinement and stable state transitions through constructive and destructive interference. Using the Finite Element Method (FEM), twenty key performance parameters were evaluated, Some criteria's results indicate that in one state of the D flip-flop, two T flip-flop states, five JK flip-flop states, and seven SR flip-flop states in transmission all exceed 100%, indicating ultralow insertion loss (–5.18&#xa0;dB), strong contrast ratio (&gt; 12.9&#xa0;dB), modulation depth above 97%, and bit rates up to 35.5 Tbps with a minimum response time of 28&#xa0;fs. The compact footprint of 400 × 350&#xa0;nm and excellent optical performance demonstrate the strong potential of the proposed plasmonic flip-flops for next-generation ultrafast and highly integrated optical computing systems.</p>

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Tbps nano-photonic logic device flip-flops at 1.55 µm

  • 期刊论文

  • 发表日期：

    2026年2月5日

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  • Zahraa Alshannoon,
  • Saif Hasan Abdulnabi

摘要

The main challenge in all-optical computing is the realization of compact, fast, and energy-efficient logic devices. Flip-flops, the essential elements of sequential logic, are typically limited in size as well as diffraction constraints in electronic or purely photonic systems. To overcome these limitations, this study proposes a nanoscale plasmonic sequential logic circuit capable of implementing four fundamental flip-flops (D, T, JK, and SR) within a single insulator–metal–insulator (IMI) multilayer structure operating at 1550 nm, with two output ports, Qn and Qn\. The design employs surface plasmon polaritons (SPPs) to achieve subwavelength light confinement and stable state transitions through constructive and destructive interference. Using the Finite Element Method (FEM), twenty key performance parameters were evaluated, Some criteria's results indicate that in one state of the D flip-flop, two T flip-flop states, five JK flip-flop states, and seven SR flip-flop states in transmission all exceed 100%, indicating ultralow insertion loss (–5.18 dB), strong contrast ratio (> 12.9 dB), modulation depth above 97%, and bit rates up to 35.5 Tbps with a minimum response time of 28 fs. The compact footprint of 400 × 350 nm and excellent optical performance demonstrate the strong potential of the proposed plasmonic flip-flops for next-generation ultrafast and highly integrated optical computing systems.