<p>This paper presents an on-chip tunable low-noise amplifier (LNA) designed for energy-efficient and cost-effective wideband wireless applications. The design employs inductive source degeneration to enhance stability and linearity while integrating floating-gate MOS (FGMOS) technology to enable on-chip, nonvolatile, and precise post-fabrication tuning. Operating across the 20–30 GHz frequency range, the amplifier achieves a voltage gain of ~19 dB, with a minimum gain of 10 dB and a reflection coefficient (S₁₁) consistently below –10 dB. The noise figure is minimized to 2 dB/Hz at port 1, and 3 dB/Hz at port 2, ensuring high signal integrity. The architecture utilizes three distinct supply voltages—Vs_dd, V_tun, and V_sp to support main operation, tunneling, and injection processes, respectively, resulting in a total power dissipation of just 10.28 mW. A key innovation lies in the replacement of conventional passive feedback components with a FGMOS-based active resistor, enabling post-fabrication tunability of both gain and operating frequency through simple bias adjustments. This approach not only reduces chip area but also improves flexibility and adaptability in dynamic RF environments. The proposed LNA is well-suited for a range of modern and emerging wideband applications, including internet of things (IoT) devices, flexible and wearable electronics, wireless sensor networks, cognitive radios, multiband transceivers, RFID systems, and communication modules for automotive and aerospace platforms. The combination of low power, compactness, and tunability makes it a strong candidate for future adaptive RF front-end systems.</p>