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<p>Asynchronous circuit design is a promising technology for Networks-on-Chip (NoCs). As a family of asynchronous circuits, Quasi-delay-insensitive (QDI) circuits have been widely used to build chip-level long interconnects due to their tolerance to delay variations. However, QDI interconnects are vulnerable to faults. Traditional Fault-Tolerant (FT) techniques for synchronous circuits cannot be easily used to protect QDI interconnects. The article presents an efficient QDI-based Asynchronous NoC (ANoC) with FT features. The Spatial Division Multiplexing (SDM)-based router is designed using the 4-phase 1-of-4 dual-rail protocol. The Delay-Insensitive Redundant Coding (DIRC) mechanism is incorporated with the SDM router to protect the QDI interconnects from transient faults in ANoC. All 1-bit transient faults and certain multi-bit transient faults are tolerated in 1-of-4 QDI pipelines using DIRC. The work evaluates area, power, energy, latency, and throughput performance parameters for both Unprotected ANoC (without DIRC) and Protected ANoC (with DIRC) designs. The 32-bit protected 4 × 4 ANoC obtains the Saturated Throughput of 854 Mbyte/Node/s with a Network Latency of 30.51 ns by consuming the 0.478 pJ/bit of Average energy. It can handle and rectify transient faults with reasonable overhead, according to experimental results, using the ANoC. Finally, the proposed approach achieves better improvement in performance measures when compared to the current ANoCs.</p>

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An efficient quasi-delay-insensitive (QDI)-based asynchronous NoC with fault tolerant features

  • 期刊论文

  • 发表日期：

    2025年10月10日

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  • Renu Siddagangappa,
  • D K Nayana,
  • T S Deepti Murthy

摘要

Asynchronous circuit design is a promising technology for Networks-on-Chip (NoCs). As a family of asynchronous circuits, Quasi-delay-insensitive (QDI) circuits have been widely used to build chip-level long interconnects due to their tolerance to delay variations. However, QDI interconnects are vulnerable to faults. Traditional Fault-Tolerant (FT) techniques for synchronous circuits cannot be easily used to protect QDI interconnects. The article presents an efficient QDI-based Asynchronous NoC (ANoC) with FT features. The Spatial Division Multiplexing (SDM)-based router is designed using the 4-phase 1-of-4 dual-rail protocol. The Delay-Insensitive Redundant Coding (DIRC) mechanism is incorporated with the SDM router to protect the QDI interconnects from transient faults in ANoC. All 1-bit transient faults and certain multi-bit transient faults are tolerated in 1-of-4 QDI pipelines using DIRC. The work evaluates area, power, energy, latency, and throughput performance parameters for both Unprotected ANoC (without DIRC) and Protected ANoC (with DIRC) designs. The 32-bit protected 4 × 4 ANoC obtains the Saturated Throughput of 854 Mbyte/Node/s with a Network Latency of 30.51 ns by consuming the 0.478 pJ/bit of Average energy. It can handle and rectify transient faults with reasonable overhead, according to experimental results, using the ANoC. Finally, the proposed approach achieves better improvement in performance measures when compared to the current ANoCs.