An Elaborative Review on RHBD Techniques for Memory Structures
摘要
Memory ICs are vital components in almost all computing systems, where reliability directly influences overall performance. Fault resilience is particularly critical in mission-oriented applications such as defense and space missions. The harsh radiation environment in space, dominated by high-energy particles from solar and cosmic sources, can induce single-event upsets (SEUs) and multiple-node upsets, leading to soft errors and potential system failures. This paper elaborates on the papers which have addressed the space related design challenges, various radiation-hardened-by-design (RHBD) techniques and balancing trade-offs among area, power, and delay. It also provides a comprehensive analysis of radiation effects and mitigation techniques for both volatile and non-volatile memory architectures. It integrates insights from SPICE, TCAD, and FPGA-based simulations to highlight design trade-offs and guide the development of low-power, radiation-tolerant memory systems for future space-grade applications. Recent innovations such as read-decoupled DICE SRAM cells achieve up to 72% reduction in read energy and 67% faster read delay, while transistor-level hardened designs like the RHRSE-20T SRAM demonstrate 255% improvement in read stability and 30% faster access. Hybrid MTJ-CMOS latches and emerging non-volatile memories, including ReRAM and spintronic architectures, further enhance resilience through intrinsic radiation immunity and self-recovery mechanisms.