<p>This work presents four new architectures of approximate full adders based on reversible quantum circuits, called reversible-logic gate-based approximate full adders (RAFAs). The objective is to develop efficient reversible approximate adders by introducing controlled inaccuracies in the Sum and/or Carry outputs of a 1-bit full adder to achieve resource optimization. This research is motivated by the increasing need for energy-efficient and quantum-compatible arithmetic units, especially for error-tolerant applications such as image processing. In the context of quantum computing, where information loss leads to energy dissipation, reversible logic circuits are essential. However, existing reversible approximate full adders often suffer from high quantum cost (QC), large gate count (GC), and increased resource overhead due to ancillary inputs (AIs) and garbage outputs (GOs). To address these limitations, the proposed RAFAs are evaluated against existing counterparts using key metrics such as GC, QC, AIs, and GOs. Notably, RAFA3 achieves a 50% reduction in QC and a 66.67% reduction in GC compared to the best existing designs. The practical effectiveness of the proposed adders is further validated through image processing (image addition) tasks using image quality metrics, including peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM). RAFA4 demonstrates significant improvements, achieving a 7.65% increase in PSNR and a 9.09% improvement in SSIM over the best existing design. The reversible circuits are verified using the Cadence Xcelium tool, and the image processing part is examined using the MATLAB tool.</p>