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<p>This work presents the design and comprehensive analysis of a triple-material gate silicon-on-insulator (SOI) fin field-effect transistor (FinFET) with low-κ spacer, aimed at surpassing the performance of conventional FinFET devices. By incorporating three distinct gate materials with engineered work functions, the proposed triple-material gate FinFET structure effectively suppresses short-channel effects (SCE). Further, spacer engineering is employed to optimize device characteristics, with various spacer types (low-κ, high-κ, and asymmetric configurations) evaluated for their impact on electrical, analog, and radio frequency (RF) performance metrics. Among all spacer combinations, the low-κ spacer (F1) exhibits the most favorable characteristics for RF and analog applications, providing the highest cutoff frequency of 352&#xa0;GHz which is 3.23% higher than F2, 19.32% higher than F3, and 26.16% higher than F4, indicating its superior high-frequency performance compared to all other spacer configurations, significantly reduced drain-induced barrier lowering (DIBL = 38&#xa0;mV/V), and low output conductance, making it a highly suitable choice for high-performance device design. The optimized triple-material gate FinFET, along with the spacer, demonstrates a high <i>I</i><sub><i>ON</i></sub><i>/I</i><sub><i>OFF</i></sub> ratio exceeding 10<sup>6</sup>, a near-ideal subthreshold swing (<i>SS</i>) of ~ 60&#xa0;mV/dec, a threshold voltage (<i>V</i><sub>th</sub>) of ~ 0.34&#xa0;V, and significantly reduced SCEs. These results of triple-material gate FinFETs, combined with spacer engineering, will surely be promising for next-generation low-power, high-performance analog/RF integrated circuits.</p>

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Spacer–Gate Synergy in Tri-Material FinFETs: Performance Analysis for RF/Analog Applications

  • 期刊论文

  • 发表日期：

    2026年2月4日

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  • R. Linie Sharon,
  • A. Shirly Edward

摘要

This work presents the design and comprehensive analysis of a triple-material gate silicon-on-insulator (SOI) fin field-effect transistor (FinFET) with low-κ spacer, aimed at surpassing the performance of conventional FinFET devices. By incorporating three distinct gate materials with engineered work functions, the proposed triple-material gate FinFET structure effectively suppresses short-channel effects (SCE). Further, spacer engineering is employed to optimize device characteristics, with various spacer types (low-κ, high-κ, and asymmetric configurations) evaluated for their impact on electrical, analog, and radio frequency (RF) performance metrics. Among all spacer combinations, the low-κ spacer (F1) exhibits the most favorable characteristics for RF and analog applications, providing the highest cutoff frequency of 352 GHz which is 3.23% higher than F2, 19.32% higher than F3, and 26.16% higher than F4, indicating its superior high-frequency performance compared to all other spacer configurations, significantly reduced drain-induced barrier lowering (DIBL = 38 mV/V), and low output conductance, making it a highly suitable choice for high-performance device design. The optimized triple-material gate FinFET, along with the spacer, demonstrates a high ION/IOFF ratio exceeding 106, a near-ideal subthreshold swing (SS) of ~ 60 mV/dec, a threshold voltage (Vth) of ~ 0.34 V, and significantly reduced SCEs. These results of triple-material gate FinFETs, combined with spacer engineering, will surely be promising for next-generation low-power, high-performance analog/RF integrated circuits.