SiP Epitaxial Growth for DRAM Bit Contact
摘要
Next-generation dynamic random-access memory (DRAM) series will rely on the ability to obtain low-resistance contact junctions in very tight spaces and narrow trenches. Current DRAM technology uses a polycrystalline plug, followed by silicidation with Ti metal to obtain a low-resistance interface. The upcoming generations of DRAM series requires us to narrow the bit contact (BC) CD down to ~ 10 nm and further decrease the BC resistance. This requires the use of a highly doped epitaxial plug to obtain low resistance BC. In this paper, we study the growth mechanisms and physics of SiP epitaxy. We explain the process optimizations that were undertaken to obtain an epitaxial plug close to our device specifications. We also explore the fundamental limitations of epitaxial growth, referred to in this paper as epi trilemma. TEM/STEM and fundamental material characterizations showed the fundamental mechanisms behind the growth of SiP epitaxy. Furthermore, we also characterized the effects of post-processing on the structural integrity of the BC.