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Optimized Gate Metal Variant Structure for Graded-Channel (GC) Gate-Stack (GS) Double-Gate (DG) MOSFET to Enhance Switching Speed, Analog and RF Performance

  • Dibyendu Chowdhury,
  • Suddhendu DasMahapatra,
  • Bishnu Prasad De,
  • Madhusudan Maiti,
  • Rajib Kar,
  • Durbadal Mandal,
  • Jagannath Samanta

摘要

Graded-channel gate-stack double-gate metal-oxide-semiconductor field-effect transistors (GC-GS-DG-MOSFETs) with symmetric single-material-gate-metal (D1), asymmetric single-material-gate-metal (D2 and D3), dual-material-gate-metal (D4 and D5), and triple-material-gate-metal (D6 and D7) have been investigated to optimize the best structure for ultra-fast digital logic circuit and RF microwave circuit applications. The work function ( \({\varphi }_{m}=4.7\pm 0.2 eV)\) φ m = 4.7 ± 0.2 e V ) of the gate electrodes has been determined based on key performance indicators, such as offset current, the ION/IOFF ratio, and threshold voltage. This study identifies the designs that offer improved switching speed and overall device performance by evaluating ION/IOFF, subthreshold swing, and threshold voltage. It also illustrates the electric field distribution, surface potential, and energy band diagram of the channel for all proposed configurations. Analog/ RF performance has been estimated by investigating the transconductance (gm), output conductance (gd), early voltage (VEA), output resistance Ro), transconductance generation factor (TGF), cut-off frequency (fT), intrinsic device delay (s), transconductance frequency product (TFP), and gain-bandwidth product (GBP). Additionally, linearity parameters, such as higher-order transconductance (gm2, gm3), VIP2, VIP3, third-order intercept point (IIP3), and third-order intermodulation distortion (IMD3)) have also been assessed.