Ab Initio Materials Modeling of Point Defects in a High-κ Metal Gate Stack of Scaled CMOS Devices: Variability Versus Engineering the Effective Work Function

Silicon (Si) and its oxide (SiO₂) have been the workhorse of the scaling-driven semiconductor industry. Almost a decade and a half ago, the high-κ metal gate (HKMG) was introduced by Intel for 45-nm technology and by IBM for 32-nm-based complementary metal–oxide–semiconductor (CMOS) technology, wherein hafnium oxide (HfO₂) and titanium nitride (TiN) were used in the gate stack as the preferred high-κ dielectric and work function metal, respectively. The performance of these scaled CMOS devices at sub-5 nm and beyond relies on accurate control of materials in the bulk and at the interfaces in terms of chemical composition, nature of atomic species, and defects. The defects in gate oxides and at their interfaces influence the threshold voltage shift and mobility degradation. Employing first-principles modeling based on density functional theory, we discuss ways to engineer the effective work function (EWF). We also discuss the variability in the EWF and the reliability issues due to the presence of oxygen point defects in the HKMG stack. We point out the possibilities for EWF engineering through material innovation, point defects, and interface dipole engineering, in order to achieve the required threshold voltage (V_T) of aggressively scaled CMOS devices at sub-5-nm technologies.