Asymmetric WSe2 reconfigurable devices for logic-in-memory computing: contact barrier engineering and floating gate-controlled operation
摘要
The explosive growth of artificial intelligence, autonomous driving, and the Internet of Things demands edge devices capable of making localized decisions within milliseconds. This imposes considerable requirements on the energy efficiency of hardware. Traditional von Neumann architectures suffer from serious energy consumption issues owing to the separation of memory and computing modules. This study developed an asymmetric WSe2/h-BN/graphene (Gr) reconfigurable floating-gate field-effect transistor (AFGFET). The reconfigurability of device functionality is achieved by dynamically adjusting the Schottky barrier through asymmetric Au/Gr electrodes and floating-gate charge storage, which integrates logical reconfigurability and nonvolatile storage within a single device. By simply changing the source-drain bias and the back-gate voltage, six Boolean logic functions, namely, NAND, IMP, NOT, TRUE, AND, and NIMP, can be dynamically executed. Compared with traditional static complementary metal-oxide-semiconductor (CMOS) logic-inmemory (LIM) circuits implementing the same logic functions, the usage of transistors is reduced by 87.5%. Owing to the modulation effect of the employed engineering technology, the transistors can be flexibly adjusted to exhibit bipolar or p-type characteristics. When used as a memory, endurance of > 103 cycles and retention time of > 2000 s can be achieved, demonstrating nonvolatile storage capabilities. The developed AFGFET, which combines logical reconfigurability and nonvolatile storage characteristics, will open up a new paradigm for high-density, low-power storage.