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<p>Computer system architecture serves as a crucial bridge between software applications and the underlying hardware, encompassing components like compilers, CPUs, coprocessors, and RTL designs. Its development, from early mainframes to modern domain-specific architectures, has been driven by rising computational demands and advancements in semiconductor technology. However, traditional paradigms in computer system architecture design are confronting significant challenges, including a reliance on manual expertise, fragmented optimization across software and hardware layers, and high costs associated with exploring expansive design spaces. While automated methods leveraging optimization algorithms and machine learning (ML) have improved efficiency, they remain constrained by a single-stage focus, limited data availability, and a lack of comprehensive human domain knowledge. The emergence of large language models (LLMs) offers transformative opportunities for the design of computer system architecture and search paradigms. By leveraging the capabilities of LLMs in areas such as code generation, data analysis, and performance modeling, the traditional manual design process can be transitioned to a machine-based automated design approach. To harness this potential, we present the large processor chip model (LPCM), an LLM-driven framework aimed at achieving end-to-end automated computer system architecture design. The development of LPCM is structured into three levels: (1) human-centric, which assists in code generation and parameter tuning; (2) agent-orchestrated, facilitating cross-layer optimization through toolchain integration (e.g., LLVM, Gem5) and the autonomous execution of subtasks; and (3) model-governed, achieving full automation through the synthesis of hardware-software co-design, simulation, and iterative refinement. This paper utilizes 3D Gaussian splatting (3D GS) as a representative workload and employs the concept of software-hardware collaborative design to examine the implementation of the LPCM at Level 1, demonstrating the effectiveness of the proposed approach. Furthermore, this paper provides an in-depth discussion on the pathway to implementing Level 2 and Level 3 of the LPCM, along with an analysis of the existing challenges.</p>

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Large processor chip model

  • 期刊论文

  • 发表日期：

    2026年4月9日

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  • Kaiyan Chang,
  • Mingzhi Chen,
  • Yunji Chen,
  • Zhirong Chen,
  • Dongrui Fan,
  • Junfeng Gong,
  • Nan Guo,
  • Yinhe Han,
  • Qinfen Hao,
  • Shuo Hou,
  • Xuan Huang,
  • Pengwei Jin,
  • Changxin Ke,
  • Cangyuan Li,
  • Guangli Li,
  • Huawei Li,
  • Kuan Li,
  • Naipeng Li,
  • Shengwen Liang,
  • Cheng Liu,
  • Hongwei Liu,
  • Jiahua Liu,
  • Junliang Lv,
  • Jianan Mu,
  • Jin Qin,
  • Bin Sun,
  • Chenxi Wang,
  • Duo Wang,
  • Mingjun Wang,
  • Ying Wang,
  • Chenggang Wu,
  • Peiyang Wu,
  • Teng Wu,
  • Xiao Xiao,
  • Mengyao Xie,
  • Chenwei Xiong,
  • Ruiyuan Xu,
  • Mingyu Yan,
  • Xiaochun Ye,
  • Kuai Yu,
  • Rui Zhang,
  • Shuoming Zhang,
  • Jiacheng Zhao

摘要

Computer system architecture serves as a crucial bridge between software applications and the underlying hardware, encompassing components like compilers, CPUs, coprocessors, and RTL designs. Its development, from early mainframes to modern domain-specific architectures, has been driven by rising computational demands and advancements in semiconductor technology. However, traditional paradigms in computer system architecture design are confronting significant challenges, including a reliance on manual expertise, fragmented optimization across software and hardware layers, and high costs associated with exploring expansive design spaces. While automated methods leveraging optimization algorithms and machine learning (ML) have improved efficiency, they remain constrained by a single-stage focus, limited data availability, and a lack of comprehensive human domain knowledge. The emergence of large language models (LLMs) offers transformative opportunities for the design of computer system architecture and search paradigms. By leveraging the capabilities of LLMs in areas such as code generation, data analysis, and performance modeling, the traditional manual design process can be transitioned to a machine-based automated design approach. To harness this potential, we present the large processor chip model (LPCM), an LLM-driven framework aimed at achieving end-to-end automated computer system architecture design. The development of LPCM is structured into three levels: (1) human-centric, which assists in code generation and parameter tuning; (2) agent-orchestrated, facilitating cross-layer optimization through toolchain integration (e.g., LLVM, Gem5) and the autonomous execution of subtasks; and (3) model-governed, achieving full automation through the synthesis of hardware-software co-design, simulation, and iterative refinement. This paper utilizes 3D Gaussian splatting (3D GS) as a representative workload and employs the concept of software-hardware collaborative design to examine the implementation of the LPCM at Level 1, demonstrating the effectiveness of the proposed approach. Furthermore, this paper provides an in-depth discussion on the pathway to implementing Level 2 and Level 3 of the LPCM, along with an analysis of the existing challenges.