Low Power Wideband Folded Cascade Based Transimpedance Amplifier Using Flipped Voltage Follower and Floating Gate MOSFET

In this paper a novel low power wideband CMOS transimpedance amplifier (TIA) with reduced peaking at low supply voltage has been presented. In the proposed TIA, floating gate MOSFET (FGMOS) and flipped voltage follower (FVF) techniques are employed in folded cascade (FC) based TIA. Both FGMOS and FVF techniques make proposed TIA suitable for low voltage operations. Furthermore, to enhance the − 3 dB bandwidth an inductive peaking technique is incorporated which works without affecting the gain. Moreover, this peaking technique does not alter the noise performance of the circuit. Simulation of the proposed TIA design is conducted using Mentor Graphics with CMOS-based TSMC 0.18 µm technology using 0.3 pF input photodiode capacitor. Simulation results of the proposed TIA demonstrate an enhanced -3 dB bandwidth of 13.2 GHz, showing 41% improvement compared to conventional FC-based TIAs and, a transimpedance gain of 50.5 dBΩ. The input referred noise for the suggested TIA is 21.6 pA√Hz. The proposed circuit consumes 3 mW from 1.2 V power supply.