Energy-Aware Register Allocation for VLIW Processors

The efficiency of VLIW processors can be improved by reducing the energy consumption associated with accessing the register-file. This paper presents an energy-aware register allocation approach to reduce the dynamic energy consumption of a scheduled program by using an evolutionary algorithm approach and a register access transition energy model. Additionally, the influence of instruction scheduling on energy-aware register allocation is analyzed. By using the proposed energy-aware compiler backend on synthetic applications with random data in the register-file, the dynamic energy consumption of the total processor core for an exemplary VLIW processor can be reduced by up to \(\varvec{21\%}\) $\mathbf{21}\mathbf{\%}$ compared to a heuristic register allocation. In real-world applications from the domain of hearing aids, energy consumption can be reduced by up to \(\varvec{42.7\%}\) $\mathbf{42.7}\mathbf{\%}$ for single applications, and \(\varvec{17.6\%}\) $\mathbf{17.6}\mathbf{\%}$ average across a range of applications.