<p>Modern heterogeneous multi-core chips are increasingly integrating diverse types of computing units to enhance system performance, among which CPUs and GPUs exhibit significant differences in communication patterns and resource demands. These differences pose new challenges to on-chip networks, or NoCs, in traffic scheduling and resource allocation. Efficiently coordinating resources among various computation traffics to maintain communication performance under dynamic loads has become a key issue in system design. To address this challenge, this paper proposes three scenario-oriented arbitration mechanisms for heterogeneous NoCs, each tailored to different load scenarios. The mechanisms are, respectively, designed based on traffic-aware time-slice allocation with threshold-triggered priority promotion, port load feedback adjustment, and reinforcement learning-driven arbitration. TATS and LATS keep rule-based determinism with low control complexity, while RATS targets highly concurrent traffic to improve adaptivity. Simulation experiments on a heterogeneous platform demonstrate that the proposed methods exhibit significant advantages across different application scenarios. Under high-load conditions, the RATS mechanism reduces average network latency by 41.33% and improves CPU performance by 14.2%.</p>