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<p>Simulation enables cost-effective and rapid prototyping in computer architecture research. It helps assess the impact of architectural changes on performance, area, and energy consumption, playing a crucial role in early-stage development. Gem5 has become a widely used simulation tool in academia and industry for researching multicore architectures. However, its accuracy depends on proper configuration. Key parameters, such as core microarchitecture, memory hierarchy, and interconnection network, must be carefully calibrated to ensure realistic results. This work highlights the importance of a well-adjusted simulation environment for modeling modern multicore setups, with a focus on coherence directory. We refine core, memory, and interconnection parameters, identifying and addressing deficiencies in the simulation infrastructure. We introduce new functionalities and statistics to enhance system characterization. We implement Intel’s top-down methodology in gem5, extending it with two new levels to analyze coherence activity’s impact on performance. Lastly, we enable gem5 to support various sparse directory architectures.</p>

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Precise characterization of coherence activity in multicores using gem5

  • 期刊论文

  • 发表日期：

    2025年5月30日

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  • Joaquín Ferrer,
  • Juan M. Cebrian,
  • Ricardo Fernández-Pascual,
  • Manuel E. Acacio

摘要

Simulation enables cost-effective and rapid prototyping in computer architecture research. It helps assess the impact of architectural changes on performance, area, and energy consumption, playing a crucial role in early-stage development. Gem5 has become a widely used simulation tool in academia and industry for researching multicore architectures. However, its accuracy depends on proper configuration. Key parameters, such as core microarchitecture, memory hierarchy, and interconnection network, must be carefully calibrated to ensure realistic results. This work highlights the importance of a well-adjusted simulation environment for modeling modern multicore setups, with a focus on coherence directory. We refine core, memory, and interconnection parameters, identifying and addressing deficiencies in the simulation infrastructure. We introduce new functionalities and statistics to enhance system characterization. We implement Intel’s top-down methodology in gem5, extending it with two new levels to analyze coherence activity’s impact on performance. Lastly, we enable gem5 to support various sparse directory architectures.