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<p>The Mølmer–Sørensen gate, a cornerstone entangling operation in trapped-ion systems, represents a promising alternative to standard entangling gates in superconducting quantum architectures. However, its performance on superconducting hardware has remained unverified. In this work, we present a hardware-efficient implementation of the Mølmer–Sørensen gate and characterize its performance using quantum process tomography (QPT) on IBM Quantum’s superconducting processors. Our implementation achieves a process fidelity of 92.47% on the real quantum hardware, a performance competitive with the 93.02% fidelity of the device’s native controlled-NOT (CX) gate. Furthermore, for the <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\(\vert {00} \rangle \)</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mo stretchy="false">|</mo> <mn>00</mn> <mo stretchy="false">⟩</mo> </mrow> </math></EquationSource> </InlineEquation> input state, the gate prepares the target Bell state with <InlineEquation ID="IEq2"> <EquationSource Format="TEX">\(94.2\%\)</EquationSource> <EquationSource Format="MATHML"><math> <mrow> <mn>94.2</mn> <mo>%</mo> </mrow> </math></EquationSource> </InlineEquation> success probability, confirming its correct logical operation. These results demonstrate that non-native entangling gates can be optimized to perform on par with hardware-native operations. This work expands the effective gate set for algorithm design on fixed-architecture processors and provides a critical benchmark for cross-platform gate evaluation, underscoring the role of hardware-aware compilation in advancing noisy intermediate-scale quantum (NISQ) computing.</p>

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A hardware-efficient Mølmer–Sørensen gate for superconducting quantum computers

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  • 发表日期：

    2026年4月21日

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  • Muhammad AbuGhanem

摘要

The Mølmer–Sørensen gate, a cornerstone entangling operation in trapped-ion systems, represents a promising alternative to standard entangling gates in superconducting quantum architectures. However, its performance on superconducting hardware has remained unverified. In this work, we present a hardware-efficient implementation of the Mølmer–Sørensen gate and characterize its performance using quantum process tomography (QPT) on IBM Quantum’s superconducting processors. Our implementation achieves a process fidelity of 92.47% on the real quantum hardware, a performance competitive with the 93.02% fidelity of the device’s native controlled-NOT (CX) gate. Furthermore, for the \(\vert {00} \rangle \) | 00 ⟩ input state, the gate prepares the target Bell state with \(94.2\%\) 94.2 % success probability, confirming its correct logical operation. These results demonstrate that non-native entangling gates can be optimized to perform on par with hardware-native operations. This work expands the effective gate set for algorithm design on fixed-architecture processors and provides a critical benchmark for cross-platform gate evaluation, underscoring the role of hardware-aware compilation in advancing noisy intermediate-scale quantum (NISQ) computing.