Capacitors are crucial components of superconducting qubits. Using the energy participation ratio method, we show that arc-edged capacitors reduce interface energy participation and improve electric field distribution relative to rectangular designs, supporting enhanced decoherence time. Here, we further optimize double-pad capacitor geometries by exploring how arc number and profile on opposing sides affect the Purcell-limited upper bound of \(T_\text {1,limit}\) . We deploy a deep reinforcement learning dual neural network model to enable autonomous, human-in-the-loop-free capacitor shape evolution. With \(T_\text {1,limit}\) as the optimization target and a fixed \(430~\mathrm {\mu m} \times 300~\mathrm {\mu m}\) footprint, our optimized arc-edge design exhibits a notable enhancement in the Purcell-limited \(T_\text {1,limit}\) relative to traditional rectangular capacitors. Subsequent supplementary 3D simulations further reveal that the optimized structure also mitigates surface dielectric loss, suggesting potential improvements in comprehensive coherence performance. This work thus presents a promising simulation-driven approach to the optimized design of superconducting qubit capacitors, with additional coherence benefits supported by complementary dielectric loss analysis.
