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<p>This paper presents a secure and efficient chaos-based pseudo-random number generator optimized for low-power, resource-constrained platforms. A lightweight, self-adaptive Perturbation-Randomization mechanism is embedded into the Tinkerbell map to mitigate precision-induced degradation and boost entropy, without increasing complexity. A hardware-efficient post-processing unit further enhances output randomness. Extensive evaluation confirms compliance with NIST SP800-22, Dieharder, and TestU01, while nonlinear measures (<i>LLE, PE, SampEn, RQA</i>) highlight strong dynamical complexity. Implemented on an Artix-7 FPGA, the design achieves <b>2</b>.<b>33</b>&#xa0;<b>Gbps</b> throughput at just <b>0</b>.<b>115</b>&#xa0;<b>W</b> power. Compared to existing works, it offers full statistical validation, low area <b>(227 LUTs, 232 FFs, 16 DSPs)</b>, and proven IoT suitability—unlike many prior designs that lack empirical support.</p>

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Secure chaos-based PRNG for low-power and resource-constrained devices

  • 期刊论文

  • 发表日期：

    2025年9月25日

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  • Seghier Abdelkrim,
  • Merah Hocine,
  • Merah Lahcene,
  • Özen Özer,
  • Talbi Larbi,
  • Ali-Pacha Adda

摘要

This paper presents a secure and efficient chaos-based pseudo-random number generator optimized for low-power, resource-constrained platforms. A lightweight, self-adaptive Perturbation-Randomization mechanism is embedded into the Tinkerbell map to mitigate precision-induced degradation and boost entropy, without increasing complexity. A hardware-efficient post-processing unit further enhances output randomness. Extensive evaluation confirms compliance with NIST SP800-22, Dieharder, and TestU01, while nonlinear measures (LLE, PE, SampEn, RQA) highlight strong dynamical complexity. Implemented on an Artix-7 FPGA, the design achieves 2.33 Gbps throughput at just 0.115 W power. Compared to existing works, it offers full statistical validation, low area (227 LUTs, 232 FFs, 16 DSPs), and proven IoT suitability—unlike many prior designs that lack empirical support.