Sensitivity analysis of junctionless silicon NT-TFET and performance metrics comparison with the silicon NT-TFET

In this article, we investigated the sensitivity of the junctionless silicon nanotube tunnel field-effect transistor (JLSiNT-TFET). To accomplish this, we utilized the Sentaurus TCAD software tool to generate the 3D JLSiNT-TFET device. The sensitivity analysis is conducted using the device’s geometrical parameters, including channel length (Lg), dielectric oxide (Tox) thickness, and silicon (tube wall) thickness (Tsi). This analysis is based on various device metrics, such as ON current (I_ON), OFF current (I_OFF), sub-threshold swing (SS), threshold voltage (V_th), and cut-off frequency (f_T). We observed that increasing the gate length (L_g) and tube wall thickness (Tsi) leads to sensitivity in I_ON, SS, and f_T for larger values, while these parameters exhibited lower sensitivity to I_OFF and V_th. Furthermore, when the dielectric oxide thickness (Tox) increased, we noted an increase in the sensitivity of I_OFF current, accompanied by a decrease in I_ON and f_T. Comparing the proposed device to the SiNT-TFET, we found significant improvements: I_ON improved by 39.51%, the I_ON/I_OFF ratio increased by 40%, transconductance (g_m) rose by 28.47%, and f_T surged by 94.81%. Finally, the JLSiNT-TFET device metrics confirmed that substantial superiority over the silicon nanotube tunnel field-effect transistor (SiNT-TFET).