Design of an optimized parallel hardware architecture for efficient image haze removal
摘要
An efficient hardware architecture for image dehazing is critical for many real-time applications such as autonomous vehicle systems, surveillance (CCTV) systems, and multimedia processing. This work proposes a novel hardware-friendly dehazing solution incorporating two key techniques: Simplified AirLight Estimation (SALE) and Separate Transmission Map Estimation (STME), which operate independently for improved parallelism. SALE utilizes a data down-sampling strategy to reduce processing complexity. To enhance the accuracy of AirLight (AL) estimation, a Center-Point Compensation (CPC) method is introduced. Unlike traditional dehazing approaches that rely on complex sorting and filtering, SALE adopts a preluded-AL estimation to streamline data scheduling and improve architectural efficiency. STME generates transmission maps rapidly without requiring prior AL data, further supporting independent and parallel processing. The concurrent operation of SALE and STME enhances the throughput and overall performance of the hardware design. The proposed architecture was implemented on a Zynq-7000 Field Programmable Gate Array (FPGA). Experimental results demonstrate notable improvements in image quality and hardware efficiency. On average, the Peak-Signal to Noise Ratio (PSNR) is improved by 6.39% and 5.31%, and the Structural Similarity Index Measure (SSIM) is enhanced by 5.68% and 4.49%, compared to the existing methods. In terms of hardware utilization, the logic elements are reduced by 19.02% 15.38%, and 14.12% and the power consumption is lowered by 53.55%, 35.8%, 32.12% and 32.85% respectively, when compared with the same baseline works. These results validate the effectiveness of the proposed architecture in achieving high performance and resource efficiency in real-time image dehazing applications.