Simulation, fabrication and characterization of photon-trapping holes on performance enhanced PIN detectors
摘要
In recent years, silicon-based photodetectors have been extensively utilized in various optoelectronic applications due to their compatibility with standard CMOS processes. However, their efficiency in the visible to near-infrared range is limited by high surface reflection and weak absorption in thinner silicon layers. To address these challenges, this study investigates the use of surface photon-trapping microstructures to enhance light absorption in a thick Si-based PIN photodetector. This work presents a Si-based PIN photodetector incorporating a surface-integrated hexagonal inverted photon-trapping hole array, which significantly improves quantum efficiency across a broad spectral range. The device structure was optimized by finite-difference time-domain (FDTD) simulations examining the influence of hole diameter, shape, period and lattice arrangement, depth. Three photodetectors with varying hole configurations were fabricated using optical projection lithography. Specifically, devices with hexagonal hole arrays of diameter/period ratios of 1000/1200 nm and 830/1030 nm exhibited average reflectances of 8.32% and 11.62%, respectively, across the 400–1000 nm band. The corresponding external quantum efficiencies (EQE) at 1020 nm reached 78.98% and 66.59%, representing remarkable enhancements of 124.69% and 89.44% compared to a device without holes. Moreover, the 1000/1200 nm device achieved a peak responsivity of 0.655 A/W, with a rise time of 64 μs and a recovery time of 69 μs. This photon-trapping architecture offers a cost-effective and highly compatible route toward high-performance Si photodetectors, with promising potential in optical communications and near-infrared sensing applications.