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<p>Ensuring reliable operation of Very Large Scale Integration (VLSI) circuits requires early detection of design faults, particularly stuck-at faults, which is challenging due to the increasing complexity of modern circuits. To address this, Enhancing Digital VLSI Circuit Debugging with Unified Neighbor aware Graph Neural Network Based Automated Error Detection (VLSI-CD-UNGNN-AED) is proposed. Initially, the ATALANTA tool was used to generate test data for digital circuits, providing a basis for fault detection. To improve efficiency, redundant features were removed using a dual attention autoencoder, and faults in combinational and sequential circuits were identified with a graph-based neural network. Finally, the network was optimized using the Superb Fairy-wren Optimization Algorithm to enhance detection accuracy. The experimental results show that the proposed framework achieves up to 26% higher accuracy and 30% higher precision compared to existing methods, demonstrating effective and reliable pre-silicon fault detection.</p>

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Enhancing Digital VLSI Circuit Debugging with Unified Neighbor aware Graph Neural Network Based Automated Error Detection

  • 期刊论文

  • 发表日期：

    2025年11月21日

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  • Kiran Kumar Bhadavath,
  • Vijayakumar Sajjan,
  • Narsaiah Domala,
  • Ashok Kumar Konduru,
  • Sreedhar Jadapalli,
  • Ramadevi Vemula

摘要

Ensuring reliable operation of Very Large Scale Integration (VLSI) circuits requires early detection of design faults, particularly stuck-at faults, which is challenging due to the increasing complexity of modern circuits. To address this, Enhancing Digital VLSI Circuit Debugging with Unified Neighbor aware Graph Neural Network Based Automated Error Detection (VLSI-CD-UNGNN-AED) is proposed. Initially, the ATALANTA tool was used to generate test data for digital circuits, providing a basis for fault detection. To improve efficiency, redundant features were removed using a dual attention autoencoder, and faults in combinational and sequential circuits were identified with a graph-based neural network. Finally, the network was optimized using the Superb Fairy-wren Optimization Algorithm to enhance detection accuracy. The experimental results show that the proposed framework achieves up to 26% higher accuracy and 30% higher precision compared to existing methods, demonstrating effective and reliable pre-silicon fault detection.