<p>Dynamic binary instrumentation (DBI) tools are essential for program analysis and error detection. The Disassemble-and-Resynthesise (D&amp;R) method, a key DBI technique, translates binary code into an intermediate representation (IR) for consistent instrumentation, minimizing architecture-specific dependencies. However, D&amp;R results in significant code bloat, which reduces runtime efficiency compared to native code. Additionally, the complexity of D&amp;R requires developers to understand both the program’s execution and the DBI framework, complicating practical application. To address these challenges, we propose a D&amp;R-based DBI framework that optimizes VEX IR and ensures precise debugging. We present a low-bloat optimization mechanism, including redundant copy elimination, IR type extension, and symbolic self-extension. Additionally, we propose a precise debugging and diagnostic method based on memory value consistency comparison, ensuring that code behaves consistently before and after instrumentation. We implement our design in PrecIRisc, a Valgrind-based DBI system, and evaluate PrecIRisc on SW64 and MIPS architectures. Benchmarks show that PrecIRisc achieves a 14.7% code bloat reduction on SW64 compared to Valgrind for x86. Meanwhile, results show a 3.88% code bloat reduction on MIPS compared to the original Valgrind. Further testing with code mutations and real-world programs confirms PrecIRisc’s effectiveness in debugging and diagnosis.</p>

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PrecIRisc: A High-Precision and Low-Bloat Dynamic Binary Instrumentation Tailored for RISC Architectures

  • Wenbing Xie,
  • Ruixue Guan,
  • Fanyue Yu,
  • Yiming Zhang

摘要

Dynamic binary instrumentation (DBI) tools are essential for program analysis and error detection. The Disassemble-and-Resynthesise (D&R) method, a key DBI technique, translates binary code into an intermediate representation (IR) for consistent instrumentation, minimizing architecture-specific dependencies. However, D&R results in significant code bloat, which reduces runtime efficiency compared to native code. Additionally, the complexity of D&R requires developers to understand both the program’s execution and the DBI framework, complicating practical application. To address these challenges, we propose a D&R-based DBI framework that optimizes VEX IR and ensures precise debugging. We present a low-bloat optimization mechanism, including redundant copy elimination, IR type extension, and symbolic self-extension. Additionally, we propose a precise debugging and diagnostic method based on memory value consistency comparison, ensuring that code behaves consistently before and after instrumentation. We implement our design in PrecIRisc, a Valgrind-based DBI system, and evaluate PrecIRisc on SW64 and MIPS architectures. Benchmarks show that PrecIRisc achieves a 14.7% code bloat reduction on SW64 compared to Valgrind for x86. Meanwhile, results show a 3.88% code bloat reduction on MIPS compared to the original Valgrind. Further testing with code mutations and real-world programs confirms PrecIRisc’s effectiveness in debugging and diagnosis.