Scholarlink

<p>In recent years, the covert insertion of hardware Trojans (HTs) into the design and fabrication stages of the Integrated Circuit (IC) life cycle has emerged as a significant security concern. Such Hardware Trojans are meticulously designed to either alter the predefined functionalities, deviate from the established specifications, diminish performance, compromise reliability, or surreptitiously siphon sensitive data during real-time operations. Given the burgeoning nature of this threat landscape, various HT detection methodologies have been proposed in the literature. Yet, a conspicuous gap persists in terms of devising efficient detection paradigms specifically tailored for the critical design juncture. To address this lacuna, this paper presents an extensive methodology called HT-Pred that includes a Trojan attributes dataset and an HT detection model. The proposed methodology underscores the genesis of the dataset, a comprehensive assemblage of Trojan attributes distilled from gate-level netlists. Significantly, this dataset amalgamates functional and structural features from the synthesized gate-level netlists of TrustHub benchmarks, thus laying a robust foundation for the evolution of a holistic Trojan detection schema. Harnessing this dataset’s potency, we applied diverse machine learning and deep learning algorithms to discern the covert insertion of Trojans at the design inception. Notably, our most efficacious model, a Deep Neural Network, manifested an accuracy pinnacle of 98.95%. This was closely rivaled by a precision of 98.94% as evinced by a J48 Decision Tree construct. To translate this research into tangible utility, we have instantiated these algorithmic models into a stand-alone and a web-accessible interface envisaged for both the academic diaspora and industrial conglomerates. Three-Sentence Summary: 1.) This paper addresses the critical challenges of the availability of enough datasets and detection hardware Trojans (HTs) during the pre-silicon design phase, where traditional detection methods often fall short. 2.) The key innovation lies in HT-Pred, a methodology that combines a curated dataset of structural and functional features of Trojans from synthesized gate-level netlists with machine learning and deep neural network models to detect Trojan insertions effectively. 3.) The proposed deep neural network model achieved a detection accuracy of 98.95% on our dataset prepared using TrustHub benchmarks, demonstrating its effectiveness for early-stage hardware security verification.</p>

错误：搜索内容不能为空，请输入英文关键词
错误：关键词超出字数限制，请精简
高级检索

HT-Pred: An Extensive Methodology for Dataset Preparation and Hardware Trojan Prediction using Gate-Level Netlist

  • 期刊论文

  • 发表日期：

    2025年7月25日

查看全文
  • Vijaypal Singh Rathor,
  • Akshat Rastogi

摘要

In recent years, the covert insertion of hardware Trojans (HTs) into the design and fabrication stages of the Integrated Circuit (IC) life cycle has emerged as a significant security concern. Such Hardware Trojans are meticulously designed to either alter the predefined functionalities, deviate from the established specifications, diminish performance, compromise reliability, or surreptitiously siphon sensitive data during real-time operations. Given the burgeoning nature of this threat landscape, various HT detection methodologies have been proposed in the literature. Yet, a conspicuous gap persists in terms of devising efficient detection paradigms specifically tailored for the critical design juncture. To address this lacuna, this paper presents an extensive methodology called HT-Pred that includes a Trojan attributes dataset and an HT detection model. The proposed methodology underscores the genesis of the dataset, a comprehensive assemblage of Trojan attributes distilled from gate-level netlists. Significantly, this dataset amalgamates functional and structural features from the synthesized gate-level netlists of TrustHub benchmarks, thus laying a robust foundation for the evolution of a holistic Trojan detection schema. Harnessing this dataset’s potency, we applied diverse machine learning and deep learning algorithms to discern the covert insertion of Trojans at the design inception. Notably, our most efficacious model, a Deep Neural Network, manifested an accuracy pinnacle of 98.95%. This was closely rivaled by a precision of 98.94% as evinced by a J48 Decision Tree construct. To translate this research into tangible utility, we have instantiated these algorithmic models into a stand-alone and a web-accessible interface envisaged for both the academic diaspora and industrial conglomerates. Three-Sentence Summary: 1.) This paper addresses the critical challenges of the availability of enough datasets and detection hardware Trojans (HTs) during the pre-silicon design phase, where traditional detection methods often fall short. 2.) The key innovation lies in HT-Pred, a methodology that combines a curated dataset of structural and functional features of Trojans from synthesized gate-level netlists with machine learning and deep neural network models to detect Trojan insertions effectively. 3.) The proposed deep neural network model achieved a detection accuracy of 98.95% on our dataset prepared using TrustHub benchmarks, demonstrating its effectiveness for early-stage hardware security verification.